From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C337C00523 for ; Wed, 8 Jan 2020 10:40:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0FBAA206F0 for ; Wed, 8 Jan 2020 10:40:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="uHOLhO+V" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727865AbgAHKkf (ORCPT ); Wed, 8 Jan 2020 05:40:35 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:40445 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727145AbgAHKke (ORCPT ); Wed, 8 Jan 2020 05:40:34 -0500 Received: by mail-wr1-f67.google.com with SMTP id c14so2803332wrn.7; Wed, 08 Jan 2020 02:40:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=siCClIKYBSJbbyV9Fx1AWH7B6zrtxbk84GPvmjQP9HY=; b=uHOLhO+V1x6pLXu/z7YfTI/wnHQzDFdVV7yVLl1IfGKQbRkCVrCICV6jG9rUypPsF9 EogGLFTvAc9j8fguwf7uI8r1ci5Eno7V6B31z8o6eeMIjLkNllMihdtgr6ONtTV3rLA6 qMI+PxRjF4lxg7C8mUT4jw4QaynGlrHAy5d7/f5ruZFpxiwtFbyLEF0XI9hO3ZSjH8ef uXd5QquKbtlHMm8U+vYgedKflsRpd1zv/+W/WqlQcZz8jcF+uIF1I3L2HLz/kIjy77fw +ELCoR22idD9rWtySjLDPAh859wY7yAb/wZO4WZQte2D+lie7CFagsBJrPBf732+TA87 Zvvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=siCClIKYBSJbbyV9Fx1AWH7B6zrtxbk84GPvmjQP9HY=; b=CISM/1kjCeZGCWAiX8R9vPhSj0HF+maqWzljevAUeD9MBMtQOXwZQVbIGXsxAZDdT+ HAbCY6bnvglc31IzMqh+maU5zkjiDcPbA3A6oWAJZ4I2L6mee4L+uBfn42nSV9nrom3L XPQekWvauTgvZyngvZXDznInXt0RQOuaoQsREB28CdQx/cF7YZjhQ4i8rCjN7FTF6rH+ 1KpCtmMVx7DPB0sUhSr+yGEm7oDCMaqgvqUNqQb/vO3BiyJEc6esL3n7Yn4LcQeeZG5/ AKOR3AyjR3E0DVOS6Ua1yCdZVPNT8WnUl2B9aHkVz42faDObXF7429XvN8MjVVwStjQR hcJA== X-Gm-Message-State: APjAAAU2hsMj/gSDOEMfNrM9jBwqj3KqK8nkrUbPvrjwp3bDIFyriiQA YOAy1f6u0KIwYDJrte6/z74CqlQWHIMvplqRum46XDMB X-Google-Smtp-Source: APXvYqzPoDrHqZH8i5DPEVIqG+zBSIYdBoE603DpxkU4fYvZsdM0T7mXmsW5RIww8qDtkz4nKlMDh3Cmy9bUzC2jXMw= X-Received: by 2002:adf:f7c4:: with SMTP id a4mr3640527wrq.332.1578480032491; Wed, 08 Jan 2020 02:40:32 -0800 (PST) MIME-Version: 1.0 References: <20191124172908.10804-1-peron.clem@gmail.com> In-Reply-To: <20191124172908.10804-1-peron.clem@gmail.com> From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Date: Wed, 8 Jan 2020 11:40:21 +0100 Message-ID: Subject: Re: [PATCH v9 0/6] Add support for H6 PWM To: Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= Cc: Linux PWM List , linux-arm-kernel , linux-kernel , linux-sunxi , Maxime Ripard , Chen-Yu Tsai , Philipp Zabel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Uwe, Thierry, On Sun, 24 Nov 2019 at 18:29, Cl=C3=A9ment P=C3=A9ron wrote: > > Hi, > > This is a rework of Jernej's previous work[1] taking account all the > previous remarks. Is this series ok for you? FYI the device-tree bindings is merged in sunxi-next. Thanks, Clement > > Bindings is still strict but probe in the driver are now optionnals. > > If someone could confirm that the PWM is not broken, as my board > doesn't output it. > > Thanks, > Cl=C3=A9ment > > Jernej's cover: > Allwinner H6 SoC has PWM core which is basically the same as that found > in A20, it's just depends on additional bus clock and reset line. > > This series adds support for it and extends PWM driver functionality in > a way that it's now possible to bypass whole core and output PWM source > clock directly as a PWM signal. This functionality is needed by AC200 > chip, which is bundled in same physical package as H6 SoC, to serve as a > clock source of 24 MHz. AC200 clock input pin is bonded internally to > the second PWM channel. > > I would be grateful if anyone can test this patch series for any kind of > regression on other SoCs. > > [1]: https://patchwork.kernel.org/cover/11061737/ > > Changes in v9: > - print error code in error message > - no capital letter to keep coherency > > Changes in v8: > - Display error return code > - split commit > - bypass is false if unsupported > - return instead of goto > > Changes in v7: > - Fix indent in Yaml bindings > > Changes in v6: > - Update git commit log > - Distinguish error message > > Changes in v5: > - Move bypass calculation to pwm_calculate > - Split mod_clock fallback from bus_clk probe > - Update comment > - Move my SoB after acked-by/reviewed-by > > Changes in v4: > - item description in correct order and add a blank line > - use %pe for printing PTR_ERR > - don't print error when it's an EPROBE_DEFER > - change output clock bypass formula to match PWM policy > > Changes in v3: > - Documentation update to allow one clock without name > - Change reset optional to shared > - If reset probe failed return an error > - Remove old clock probe > - Update bypass enabled formula > > Changes in v2: > - Remove allOf in Documentation > - Add H6 example in Documentation > - Change clock name from "pwm" to "mod" > - Change reset quirk to optional probe > - Change bus_clock quirk to optional probe > - Add limitation comment about mod_clk_output > - Add quirk for mod_clk_output > - Change bypass formula > > Cl=C3=A9ment P=C3=A9ron (2): > pwm: sun4i: Prefer "mod" clock to unnamed > pwm: sun4i: Always calculate params when applying new parameters > > Jernej Skrabec (4): > pwm: sun4i: Add an optional probe for reset line > pwm: sun4i: Add an optional probe for bus clock > pwm: sun4i: Add support to output source clock directly > pwm: sun4i: Add support for H6 PWM > > drivers/pwm/pwm-sun4i.c | 187 +++++++++++++++++++++++++++++++++------- > 1 file changed, 156 insertions(+), 31 deletions(-) > > -- > 2.20.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Subject: Re: [PATCH v9 0/6] Add support for H6 PWM Date: Wed, 8 Jan 2020 11:40:21 +0100 Message-ID: References: <20191124172908.10804-1-peron.clem@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20191124172908.10804-1-peron.clem@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= Cc: Linux PWM List , Chen-Yu Tsai , Maxime Ripard , linux-kernel , linux-sunxi , Philipp Zabel , linux-arm-kernel List-Id: linux-pwm@vger.kernel.org SGkgVXdlLCBUaGllcnJ5LAoKT24gU3VuLCAyNCBOb3YgMjAxOSBhdCAxODoyOSwgQ2zDqW1lbnQg UMOpcm9uIDxwZXJvbi5jbGVtQGdtYWlsLmNvbT4gd3JvdGU6Cj4KPiBIaSwKPgo+IFRoaXMgaXMg YSByZXdvcmsgb2YgSmVybmVqJ3MgcHJldmlvdXMgd29ya1sxXSB0YWtpbmcgYWNjb3VudCBhbGwg dGhlCj4gcHJldmlvdXMgcmVtYXJrcy4KCklzIHRoaXMgc2VyaWVzIG9rIGZvciB5b3U/CkZZSSB0 aGUgZGV2aWNlLXRyZWUgYmluZGluZ3MgaXMgbWVyZ2VkIGluIHN1bnhpLW5leHQuCgpUaGFua3Ms CkNsZW1lbnQKCj4KPiBCaW5kaW5ncyBpcyBzdGlsbCBzdHJpY3QgYnV0IHByb2JlIGluIHRoZSBk cml2ZXIgYXJlIG5vdyBvcHRpb25uYWxzLgo+Cj4gSWYgc29tZW9uZSBjb3VsZCBjb25maXJtIHRo YXQgdGhlIFBXTSBpcyBub3QgYnJva2VuLCBhcyBteSBib2FyZAo+IGRvZXNuJ3Qgb3V0cHV0IGl0 Lgo+Cj4gVGhhbmtzLAo+IENsw6ltZW50Cj4KPiBKZXJuZWoncyBjb3ZlcjoKPiBBbGx3aW5uZXIg SDYgU29DIGhhcyBQV00gY29yZSB3aGljaCBpcyBiYXNpY2FsbHkgdGhlIHNhbWUgYXMgdGhhdCBm b3VuZAo+IGluIEEyMCwgaXQncyBqdXN0IGRlcGVuZHMgb24gYWRkaXRpb25hbCBidXMgY2xvY2sg YW5kIHJlc2V0IGxpbmUuCj4KPiBUaGlzIHNlcmllcyBhZGRzIHN1cHBvcnQgZm9yIGl0IGFuZCBl eHRlbmRzIFBXTSBkcml2ZXIgZnVuY3Rpb25hbGl0eSBpbgo+IGEgd2F5IHRoYXQgaXQncyBub3cg cG9zc2libGUgdG8gYnlwYXNzIHdob2xlIGNvcmUgYW5kIG91dHB1dCBQV00gc291cmNlCj4gY2xv Y2sgZGlyZWN0bHkgYXMgYSBQV00gc2lnbmFsLiBUaGlzIGZ1bmN0aW9uYWxpdHkgaXMgbmVlZGVk IGJ5IEFDMjAwCj4gY2hpcCwgd2hpY2ggaXMgYnVuZGxlZCBpbiBzYW1lIHBoeXNpY2FsIHBhY2th Z2UgYXMgSDYgU29DLCB0byBzZXJ2ZSBhcyBhCj4gY2xvY2sgc291cmNlIG9mIDI0IE1Iei4gQUMy MDAgY2xvY2sgaW5wdXQgcGluIGlzIGJvbmRlZCBpbnRlcm5hbGx5IHRvCj4gdGhlIHNlY29uZCBQ V00gY2hhbm5lbC4KPgo+IEkgd291bGQgYmUgZ3JhdGVmdWwgaWYgYW55b25lIGNhbiB0ZXN0IHRo aXMgcGF0Y2ggc2VyaWVzIGZvciBhbnkga2luZCBvZgo+IHJlZ3Jlc3Npb24gb24gb3RoZXIgU29D cy4KPgo+IFsxXTogaHR0cHM6Ly9wYXRjaHdvcmsua2VybmVsLm9yZy9jb3Zlci8xMTA2MTczNy8K Pgo+IENoYW5nZXMgaW4gdjk6Cj4gIC0gcHJpbnQgZXJyb3IgY29kZSBpbiBlcnJvciBtZXNzYWdl Cj4gIC0gbm8gY2FwaXRhbCBsZXR0ZXIgdG8ga2VlcCBjb2hlcmVuY3kKPgo+IENoYW5nZXMgaW4g djg6Cj4gIC0gRGlzcGxheSBlcnJvciByZXR1cm4gY29kZQo+ICAtIHNwbGl0IGNvbW1pdAo+ICAt IGJ5cGFzcyBpcyBmYWxzZSBpZiB1bnN1cHBvcnRlZAo+ICAtIHJldHVybiBpbnN0ZWFkIG9mIGdv dG8KPgo+IENoYW5nZXMgaW4gdjc6Cj4gIC0gRml4IGluZGVudCBpbiBZYW1sIGJpbmRpbmdzCj4K PiBDaGFuZ2VzIGluIHY2Ogo+ICAtIFVwZGF0ZSBnaXQgY29tbWl0IGxvZwo+ICAtIERpc3Rpbmd1 aXNoIGVycm9yIG1lc3NhZ2UKPgo+IENoYW5nZXMgaW4gdjU6Cj4gIC0gTW92ZSBieXBhc3MgY2Fs Y3VsYXRpb24gdG8gcHdtX2NhbGN1bGF0ZQo+ICAtIFNwbGl0IG1vZF9jbG9jayBmYWxsYmFjayBm cm9tIGJ1c19jbGsgcHJvYmUKPiAgLSBVcGRhdGUgY29tbWVudAo+ICAtIE1vdmUgbXkgU29CIGFm dGVyIGFja2VkLWJ5L3Jldmlld2VkLWJ5Cj4KPiBDaGFuZ2VzIGluIHY0Ogo+ICAtIGl0ZW0gZGVz Y3JpcHRpb24gaW4gY29ycmVjdCBvcmRlciBhbmQgYWRkIGEgYmxhbmsgbGluZQo+ICAtIHVzZSAl cGUgZm9yIHByaW50aW5nIFBUUl9FUlIKPiAgLSBkb24ndCBwcmludCBlcnJvciB3aGVuIGl0J3Mg YW4gRVBST0JFX0RFRkVSCj4gIC0gY2hhbmdlIG91dHB1dCBjbG9jayBieXBhc3MgZm9ybXVsYSB0 byBtYXRjaCBQV00gcG9saWN5Cj4KPiBDaGFuZ2VzIGluIHYzOgo+ICAtIERvY3VtZW50YXRpb24g dXBkYXRlIHRvIGFsbG93IG9uZSBjbG9jayB3aXRob3V0IG5hbWUKPiAgLSBDaGFuZ2UgcmVzZXQg b3B0aW9uYWwgdG8gc2hhcmVkCj4gIC0gSWYgcmVzZXQgcHJvYmUgZmFpbGVkIHJldHVybiBhbiBl cnJvcgo+ICAtIFJlbW92ZSBvbGQgY2xvY2sgcHJvYmUKPiAgLSBVcGRhdGUgYnlwYXNzIGVuYWJs ZWQgZm9ybXVsYQo+Cj4gQ2hhbmdlcyBpbiB2MjoKPiAgLSBSZW1vdmUgYWxsT2YgaW4gRG9jdW1l bnRhdGlvbgo+ICAtIEFkZCBINiBleGFtcGxlIGluIERvY3VtZW50YXRpb24KPiAgLSBDaGFuZ2Ug Y2xvY2sgbmFtZSBmcm9tICJwd20iIHRvICJtb2QiCj4gIC0gQ2hhbmdlIHJlc2V0IHF1aXJrIHRv IG9wdGlvbmFsIHByb2JlCj4gIC0gQ2hhbmdlIGJ1c19jbG9jayBxdWlyayB0byBvcHRpb25hbCBw cm9iZQo+ICAtIEFkZCBsaW1pdGF0aW9uIGNvbW1lbnQgYWJvdXQgbW9kX2Nsa19vdXRwdXQKPiAg LSBBZGQgcXVpcmsgZm9yIG1vZF9jbGtfb3V0cHV0Cj4gIC0gQ2hhbmdlIGJ5cGFzcyBmb3JtdWxh Cj4KPiBDbMOpbWVudCBQw6lyb24gKDIpOgo+ICAgcHdtOiBzdW40aTogUHJlZmVyICJtb2QiIGNs b2NrIHRvIHVubmFtZWQKPiAgIHB3bTogc3VuNGk6IEFsd2F5cyBjYWxjdWxhdGUgcGFyYW1zIHdo ZW4gYXBwbHlpbmcgbmV3IHBhcmFtZXRlcnMKPgo+IEplcm5laiBTa3JhYmVjICg0KToKPiAgIHB3 bTogc3VuNGk6IEFkZCBhbiBvcHRpb25hbCBwcm9iZSBmb3IgcmVzZXQgbGluZQo+ICAgcHdtOiBz dW40aTogQWRkIGFuIG9wdGlvbmFsIHByb2JlIGZvciBidXMgY2xvY2sKPiAgIHB3bTogc3VuNGk6 IEFkZCBzdXBwb3J0IHRvIG91dHB1dCBzb3VyY2UgY2xvY2sgZGlyZWN0bHkKPiAgIHB3bTogc3Vu NGk6IEFkZCBzdXBwb3J0IGZvciBINiBQV00KPgo+ICBkcml2ZXJzL3B3bS9wd20tc3VuNGkuYyB8 IDE4NyArKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKystLS0tLS0tCj4gIDEgZmlsZSBj aGFuZ2VkLCAxNTYgaW5zZXJ0aW9ucygrKSwgMzEgZGVsZXRpb25zKC0pCj4KPiAtLQo+IDIuMjAu MQo+CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51 eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVh ZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1h cm0ta2VybmVsCg==