From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753541AbbDAT7S (ORCPT ); Wed, 1 Apr 2015 15:59:18 -0400 Received: from mail-lb0-f173.google.com ([209.85.217.173]:34790 "EHLO mail-lb0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753329AbbDAT7M (ORCPT ); Wed, 1 Apr 2015 15:59:12 -0400 MIME-Version: 1.0 In-Reply-To: <1427204440-3533-1-git-send-email-adrian.hunter@intel.com> References: <1427204440-3533-1-git-send-email-adrian.hunter@intel.com> Date: Wed, 1 Apr 2015 15:59:10 -0400 X-Google-Sender-Auth: rQ3g-f_X8PnymkGfG7IYlWTRnm4 Message-ID: Subject: Re: [RFC PATCH 0/4] mmc: sdhci: Support maximum DMA latency request via PM QoS From: Len Brown To: Adrian Hunter Cc: Ulf Hansson , linux-mmc , "Rafael J. Wysocki" , Len Brown , Pavel Machek , Kevin Hilman , Tomeu Vizoso , Linux PM list , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Ad hoc testing with Lenovo Thinkpad 10 showed a stress > test could run for at least 24 hours with the patches, > compared to less than an hour without. There is a patch in linux-next to delete C1E from BYT, since it is problematic on multiple platforms. I don't suppose that just disabling that state without disabling C6 is sufficient to fix the Thinkpad 10? (I'm betting not, but it can't hurt to try -- you can use the "disable" attribute for the state in /sys/devices/system/cpu/cpu*/cpuidle/stateN) I think your choice of the PM_QOS sub-system here is the right one, and that your selection of 20usec threshold is also a good choice for what you want to do -- though on non-intel_idle machine somplace, there may be some ACPI BIOS _CST with random number for C6 latency. It would be interesting to see how your C6 residency (turbostat --debug will show this to you) and your battery life are changed by disabling C6 during MMC activity. cheers, Len Brown, Intel Open Source Technology Center