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From: Michael Rolnik <mrolnik@gmail.com>
To: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"linux-snps-arc@lists.infradead.org"
	<linux-snps-arc@lists.infradead.org>
Subject: Re: [Qemu-devel] [PATCH RFC v1 00/29] ARC cores
Date: Sat, 17 Sep 2016 21:26:11 +0300	[thread overview]
Message-ID: <CAK4993iLUTDqAQ8mqVd8BwX7hb9V5dYe13GYMRJUkb8G0qSrtQ@mail.gmail.com> (raw)
In-Reply-To: <1474038116.3042.10.camel@synopsys.com>

H Alexey.

Thanks.

I need some help in getting a small code that exercises interrupts. For
several years I wrote FW for ARC based platforms (ARC4 & ARC6), but it
seems I forgot some of the things related to interrupts. I compiled
FreeRTOS demo from embARC, however I could not find interrupt vectors
there, I assume their board has ROM.
So, if you can help me with such a code, it would be great.

thanks,
Michael



On Fri, Sep 16, 2016 at 6:01 PM, Alexey Brodkin <Alexey.Brodkin@synopsys.com
> wrote:

> Hi Michael,
>
> On Fri, 2016-09-09 at 01:31 +0300, Michael Rolnik wrote:
> > This series of patches adds ARC target to QEMU. It indends to support
> >     - ARCtangent-A5 processor
> >     - ARC 600 processor
> >     - ARC 700 processor
> >
> > All instructions except ASLS are implemented. Not fully tested yet.
> > However I was able to execute correctly recursive fibonacci calculation.
> > Reset vector is assumed to be some hardcoded value which worked for my
> test.
> > I am planning to get FreeRTOS for ARC, once I get it, I will able to
> verify
> > and complete interrupt support.
>
> That's both very unexpected and cool!
>
> I tried your patches on top of current QEMU git master and it:
>  a) Builds for ARC
>  b) Very simple code really works!
>
> I was able to single-step with GDB through program as simple as:
> --------------------->8---------------------
> .global _start
> _start:
>         mov     r0, 1
>         mov     r1, 2
>         mov     r1, r0
> --------------------->8---------------------
>
> That's what I saw in GDB:
> --------------------->8---------------------
> (gdb) disassemble
> Dump of assembler code for function _start:
> => 0x00000100 <+0>:     mov     r0,0x1
>    0x00000104 <+4>:     mov     r1,0x2
>    0x00000108 <+8>:     mov     r1,r0
> End of assembler dump.
> (gdb) p $r0
> $1 = 0
> (gdb) stepi
> 0x00000104 in _start ()
> (gdb) p $r0
> $2 = 1
> (gdb) stepi
> 0x00000108 in _start ()
> (gdb) p $r1
> $3 = 2
> (gdb) stepi
> 0x0000010c in ?? ()
> (gdb) p $r1
> $4 = 1
> --------------------->8---------------------
>
> So again this is very promising even though a lot is essentially missing
> from
> this very first implementation.
>
> Anyways IMHO it would be good to have these patches accepted so people may
> start
> playing with that stuff adding missing things one by one.
>
> Let me know if you need any help from my side.
>
> Regards,
> Alexey




-- 
Best Regards,
Michael Rolnik

  reply	other threads:[~2016-09-17 18:27 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-08 22:31 [Qemu-devel] [PATCH RFC v1 00/29] ARC cores Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 01/29] target-arc: initial commit Michael Rolnik
2016-09-20 23:31   ` Richard Henderson
2016-09-26  1:22     ` Max Filippov
2016-09-27 18:46       ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 02/29] target-arc: ADC, ADD, ADD1, ADD2, ADD3 Michael Rolnik
2016-09-20 20:51   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 03/29] target-arc: SUB, SUB1, SUB2, SUB3, SBC, RSUB, CMP Michael Rolnik
2016-09-20 23:32   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 04/29] target-arc: AND, OR, XOR, BIC, TST Michael Rolnik
2016-09-20 23:35   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 05/29] target-arc: ASL(m), ASR(m), LSR(m), ROR(m) Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 06/29] target-arc: EX, LD, ST, SYNC, PREFETCH Michael Rolnik
2016-09-20 23:46   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 07/29] target-arc: MAX, MIN Michael Rolnik
2016-09-20 23:48   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 08/29] target-arc: MOV, EXT, SEX, SWAP Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 09/29] target-arc: NEG, ABS, NOT Michael Rolnik
2016-09-20 23:55   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 10/29] target-arc: POP, PUSH Michael Rolnik
2016-09-20 23:57   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 11/29] target-arc: BCLR, BMSK, BSET, BTST, BXOR Michael Rolnik
2016-09-21  0:07   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 12/29] target-arc: RLC, RRC Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 13/29] target-arc: NORM, NORMW Michael Rolnik
2016-09-21  0:14   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 14/29] target-arc: MPY, MPYH, MPYHU, MPYU Michael Rolnik
2016-09-21  0:17   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 15/29] target-arc: MUL64, MULU64, DIVAW Michael Rolnik
2016-09-21  0:20   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 16/29] target-arc: BBIT0, BBIT1, BR Michael Rolnik
2016-09-21  0:25   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 17/29] target-arc: B, BL Michael Rolnik
2016-09-21  0:28   ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 18/29] target-arc: J, JL Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 19/29] target-arc: LR, SR Michael Rolnik
2016-09-21  0:31   ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 20/29] target-arc: ADDS, ADDSDW, SUBS, SUBSDW Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 21/29] target-arc: ABSS, ABSSW, NEGS, NEGSW, RND16, SAT16 Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 22/29] target-arc: ASLS, ASRS Michael Rolnik
2016-09-21  0:36   ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 23/29] target-arc: FLAG, BRK, SLEEP Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 24/29] target-arc: NOP, UNIMP Michael Rolnik
2016-09-21  0:39   ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 25/29] target-arc: TRAP, SWI Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 26/29] target-arc: RTIE Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 27/29] target-arc: LP Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 28/29] target-arc: decode Michael Rolnik
2016-09-21  0:49   ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 29/29] target-arc: sample board Michael Rolnik
2016-09-16 15:01 ` [PATCH RFC v1 00/29] ARC cores Alexey Brodkin
2016-09-16 15:01   ` [Qemu-devel] " Alexey Brodkin
2016-09-17 18:26   ` Michael Rolnik [this message]
2016-09-19 12:40     ` Alexey Brodkin
2016-09-19 12:55       ` Igor Guryanov
2016-09-19 13:45         ` Michael Rolnik

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