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From: Michael Rolnik <mrolnik@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v14 1/9] target-avr: AVR cores support is added.
Date: Mon, 15 Aug 2016 15:31:30 +0000	[thread overview]
Message-ID: <CAK4993j=BgD=3zDJhaDfE6RH5EbBsdJUU-Xt9h-eBe73=exoBg@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA-tdOPN13x5EpsVJ0k0UcNJcJo1_oNk+5-jjf59Z8vVgg@mail.gmail.com>

I remember I did it. So it seems to be a wrong review.

On Mon, Aug 15, 2016, 6:28 PM Peter Maydell <peter.maydell@linaro.org>
wrote:

> On 29 July 2016 at 16:32, Michael Rolnik <mrolnik@gmail.com> wrote:
> >     1. basic CPU structure
> >     2. registers
> >     3. no instructions
> >     4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
> >
> > Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
>
> > diff --git a/configure b/configure
> > index f57fcc6..c4d58b4 100755
> > --- a/configure
> > +++ b/configure
> > @@ -5641,6 +5641,8 @@ case "$target_name" in
> >    x86_64)
> >      TARGET_BASE_ARCH=i386
> >    ;;
> > +  avr)
> > +  ;;
>
> I asked you to move this in my review of v12, but you haven't.
>
> >    alpha)
> >    ;;
> >    arm|armeb)
> > @@ -5837,6 +5839,9 @@ disas_config() {
> >
> >  for i in $ARCH $TARGET_BASE_ARCH ; do
> >    case "$i" in
> > +  avr)
> > +    disas_config "AVR"
> > +  ;;
>
> Ditto.
>
> >    alpha)
> >      disas_config "ALPHA"
> >    ;;
>
> > +#ifndef QEMU_AVR_CPU_QOM_H
> > +#define QEMU_AVR_CPU_QOM_H
> > +
> > +#include "qom/cpu.h"
> > +
> > +#define TYPE_AVR_CPU "avr"
> > +
> > +#define AVR_CPU_CLASS(klass) \
> > +                    OBJECT_CLASS_CHECK(AVRCPUClass, (klass),
> TYPE_AVR_CPU)
> > +#define AVR_CPU(obj) \
> > +                    OBJECT_CHECK(AVRCPU, (obj), TYPE_AVR_CPU)
> > +#define AVR_CPU_GET_CLASS(obj) \
> > +                    OBJECT_GET_CLASS(AVRCPUClass, (obj), TYPE_AVR_CPU)
> > +
> > +/**
> > +*  AVRCPUClass:
> > +*  @parent_realize: The parent class' realize handler.
> > +*  @parent_reset: The parent class' reset handler.
> > +*  @vr: Version Register value.
> > +*
> > +*  A AVR CPU model.
> > + */
>
> The spacing here is still wrong.
>
> > +typedef struct AVRCPUClass {
> > +    CPUClass parent_class;
> > +
> > +    DeviceRealize parent_realize;
> > +    void (*parent_reset)(CPUState *cpu);
> > +} AVRCPUClass;
> > +
> > +/**
> > +*  AVRCPU:
> > +*  @env: #CPUAVRState
> > +*
> > +*  A AVR CPU.
> > +*/
>
> Ditto.
>
> > +typedef struct AVRCPU {
> > +    /* < private > */
> > +    CPUState parent_obj;
> > +    /* < public > */
> > +
> > +    CPUAVRState env;
> > +} AVRCPU;
>
> > +static bool avr_cpu_has_work(CPUState *cs)
> > +{
> > +    AVRCPU *cpu = AVR_CPU(cs);
> > +    CPUAVRState *env = &cpu->env;
> > +
> > +    return (cs->interrupt_request
> > +                &   (CPU_INTERRUPT_HARD
> > +                    | CPU_INTERRUPT_RESET))
> > +            &&  cpu_interrupts_enabled(env);
>
> I asked you to fix this spacing, but it's still all over the place.
>
> If you could check that you've addressed all the comments
> from previous patch review rounds that would make things
> faster.
>
> thanks
> -- PMM
>

  reply	other threads:[~2016-08-15 15:31 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-29 15:32 [Qemu-devel] [PATCH v14 0/9] 8bit AVR cores Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 1/9] target-avr: AVR cores support is added Michael Rolnik
2016-08-15 15:28   ` Peter Maydell
2016-08-15 15:31     ` Michael Rolnik [this message]
2016-08-15 15:46       ` Peter Maydell
2016-08-15 15:55         ` Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 2/9] target-avr: adding AVR CPU features/flavors Michael Rolnik
2016-08-15 15:31   ` Peter Maydell
2016-08-15 15:32     ` Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 3/9] target-avr: adding a sample AVR board Michael Rolnik
2016-08-15 15:33   ` Peter Maydell
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 4/9] target-avr: adding instructions encodings Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 5/9] target-avr: adding AVR interrupt handling Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 6/9] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 7/9] target-avr: adding instruction translation Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 8/9] target-avr: instruction decoder generator Michael Rolnik
2016-07-29 15:32 ` [Qemu-devel] [PATCH v14 9/9] target-avr: adding instruction decoder Michael Rolnik
2016-08-15 15:38   ` Peter Maydell
2016-08-15 15:39 ` [Qemu-devel] [PATCH v14 0/9] 8bit AVR cores Peter Maydell

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