From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758839AbcHYHlf (ORCPT ); Thu, 25 Aug 2016 03:41:35 -0400 Received: from condef003-v.nifty.com ([210.131.4.240]:35902 "EHLO condef003-v.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758008AbcHYHiD (ORCPT ); Thu, 25 Aug 2016 03:38:03 -0400 DKIM-Filter: OpenDKIM Filter v2.10.3 conssluserg-06.nifty.com u7P7VSIB011448 X-Nifty-SrcIP: [209.85.213.170] MIME-Version: 1.0 In-Reply-To: <1472109786.3032.21.camel@pengutronix.de> References: <1472045342-7434-1-git-send-email-p.zabel@pengutronix.de> <1472045342-7434-9-git-send-email-p.zabel@pengutronix.de> <1472109786.3032.21.camel@pengutronix.de> From: Masahiro Yamada Date: Thu, 25 Aug 2016 16:31:27 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 09/10] reset: zynq: add driver Kconfig option To: Philipp Zabel Cc: Linux Kernel Mailing List , Arnd Bergmann , Axel Lin , Hans de Goede , Maxime Ripard , Lee Jones , linux-arm-kernel , Moritz Fischer , Michal Simek , =?UTF-8?Q?S=C3=B6ren_Brinkmann?= Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id u7P7feLR002965 2016-08-25 16:23 GMT+09:00 Philipp Zabel : > Am Donnerstag, den 25.08.2016, 10:08 +0900 schrieb Masahiro Yamada: >> 2016-08-25 2:48 GMT+09:00 Masahiro Yamada : >> > 2016-08-24 22:29 GMT+09:00 Philipp Zabel : >> >> Visible only if COMPILE_TEST is enabled, this allows to include the >> >> driver in build tests. >> >> >> >> Cc: Moritz Fischer >> >> Cc: Michal Simek >> >> Cc: Sören Brinkmann >> >> Signed-off-by: Philipp Zabel >> >> --- >> >> drivers/reset/Kconfig | 6 ++++++ >> >> drivers/reset/Makefile | 2 +- >> >> 2 files changed, 7 insertions(+), 1 deletion(-) >> >> >> >> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig >> >> index 17030e2..86b49a2 100644 >> >> --- a/drivers/reset/Kconfig >> >> +++ b/drivers/reset/Kconfig >> >> @@ -67,6 +67,12 @@ config RESET_SUNXI >> >> help >> >> This enables the reset driver for Allwinner SoCs. >> >> >> >> +config RESET_ZYNQ >> >> + bool "ZYNQ Reset Driver" if COMPILE_TEST >> >> + default ARCH_ZYNQ >> >> + help >> >> + This enables the reset driver for Xilinx Zynq FPGAs. >> >> + >> > >> > Please move this below RESET_UNIPHIER >> > as I assume you are sorting Kconfig entries alphabetically. > > Yes, that was my intention. > >> > Otherwise, >> > >> > Reviewed-by: Masahiro Yamada >> > >> >> >> >> >> >> + This enables the reset driver for Xilinx Zynq FPGAs. >> >> >> One more thing, I thought this statement is not precise >> because Zynq is not only an FPGA, >> but ARM SoC + FPGA. >> >> Please consider to reword >> >> "This enables the reset driver for Xilinx Zynq SoC" > > I'll change it to SoCs, thanks. Maybe singular? As far as I know, Zynq-7000 is the only SoC of the Zynq family. I am not sure if Xilinx has plan to add more lineups to 32bit SoCs. -- Best Regards Masahiro Yamada From mboxrd@z Thu Jan 1 00:00:00 1970 From: yamada.masahiro@socionext.com (Masahiro Yamada) Date: Thu, 25 Aug 2016 16:31:27 +0900 Subject: [PATCH 09/10] reset: zynq: add driver Kconfig option In-Reply-To: <1472109786.3032.21.camel@pengutronix.de> References: <1472045342-7434-1-git-send-email-p.zabel@pengutronix.de> <1472045342-7434-9-git-send-email-p.zabel@pengutronix.de> <1472109786.3032.21.camel@pengutronix.de> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org 2016-08-25 16:23 GMT+09:00 Philipp Zabel : > Am Donnerstag, den 25.08.2016, 10:08 +0900 schrieb Masahiro Yamada: >> 2016-08-25 2:48 GMT+09:00 Masahiro Yamada : >> > 2016-08-24 22:29 GMT+09:00 Philipp Zabel : >> >> Visible only if COMPILE_TEST is enabled, this allows to include the >> >> driver in build tests. >> >> >> >> Cc: Moritz Fischer >> >> Cc: Michal Simek >> >> Cc: S?ren Brinkmann >> >> Signed-off-by: Philipp Zabel >> >> --- >> >> drivers/reset/Kconfig | 6 ++++++ >> >> drivers/reset/Makefile | 2 +- >> >> 2 files changed, 7 insertions(+), 1 deletion(-) >> >> >> >> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig >> >> index 17030e2..86b49a2 100644 >> >> --- a/drivers/reset/Kconfig >> >> +++ b/drivers/reset/Kconfig >> >> @@ -67,6 +67,12 @@ config RESET_SUNXI >> >> help >> >> This enables the reset driver for Allwinner SoCs. >> >> >> >> +config RESET_ZYNQ >> >> + bool "ZYNQ Reset Driver" if COMPILE_TEST >> >> + default ARCH_ZYNQ >> >> + help >> >> + This enables the reset driver for Xilinx Zynq FPGAs. >> >> + >> > >> > Please move this below RESET_UNIPHIER >> > as I assume you are sorting Kconfig entries alphabetically. > > Yes, that was my intention. > >> > Otherwise, >> > >> > Reviewed-by: Masahiro Yamada >> > >> >> >> >> >> >> + This enables the reset driver for Xilinx Zynq FPGAs. >> >> >> One more thing, I thought this statement is not precise >> because Zynq is not only an FPGA, >> but ARM SoC + FPGA. >> >> Please consider to reword >> >> "This enables the reset driver for Xilinx Zynq SoC" > > I'll change it to SoCs, thanks. Maybe singular? As far as I know, Zynq-7000 is the only SoC of the Zynq family. I am not sure if Xilinx has plan to add more lineups to 32bit SoCs. -- Best Regards Masahiro Yamada