From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756529AbdD1Lm2 (ORCPT ); Fri, 28 Apr 2017 07:42:28 -0400 Received: from mail-io0-f177.google.com ([209.85.223.177]:34594 "EHLO mail-io0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751112AbdD1LmA (ORCPT ); Fri, 28 Apr 2017 07:42:00 -0400 MIME-Version: 1.0 In-Reply-To: <1493347596.29314.55.camel@mtkswgap22> References: <1492935543-18190-1-git-send-email-ryder.lee@mediatek.com> <1492935543-18190-3-git-send-email-ryder.lee@mediatek.com> <1493194205.27023.80.camel@mtkswgap22> <1493347596.29314.55.camel@mtkswgap22> From: Arnd Bergmann Date: Fri, 28 Apr 2017 13:41:58 +0200 X-Google-Sender-Auth: RIKVLvMiYpYHOsTEO9Uny8Dn85g Message-ID: Subject: Re: [PATCH 2/2] dt-bindings: pcie: Add documentation for Mediatek PCIe To: Ryder Lee Cc: devicetree@vger.kernel.org, linux-pci , Linux Kernel Mailing List , Rob Herring , linux-mediatek@lists.infradead.org, Bjorn Helgaas , Linux ARM Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 28, 2017 at 4:46 AM, Ryder Lee wrote: > On Thu, 2017-04-27 at 21:06 +0200, Arnd Bergmann wrote: >> On Wed, Apr 26, 2017 at 10:10 AM, Ryder Lee wrote: >> > On Tue, 2017-04-25 at 14:18 +0200, Arnd Bergmann wrote: >> >> On Sun, Apr 23, 2017 at 10:19 AM, Ryder Lee wrote: >> Are any of the registers the same at all, e.g. for MSI handling? > > No, It doesn't support MSI. All I can do is using the registers that designer provide > to me. The others are inviable for software. So I treat it as different hardware. > Furthermore, we hope that we can put all mediatek drivers together > regardless of in-house IP or lincense IP > > We have no particular IP name but just use chip name to call it. So I > will temporarily use "mediatek,gen2v1-pcie" in patch v1. I think using the chip name as in the first version of your patch name is better then, in particular since the 'gen2v1' would not be an actual version number but just say which variant got merged into mainline first. A related question would be on how general we want the binding to be. Your binding text starts out by describing that there are three root ports and what their capabilities are. If you think there might be other (existing or future) chips that use the same binding and driver, then being a little more abstract could help in the long run. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: MIME-Version: 1.0 In-Reply-To: <1493347596.29314.55.camel@mtkswgap22> References: <1492935543-18190-1-git-send-email-ryder.lee@mediatek.com> <1492935543-18190-3-git-send-email-ryder.lee@mediatek.com> <1493194205.27023.80.camel@mtkswgap22> <1493347596.29314.55.camel@mtkswgap22> From: Arnd Bergmann Date: Fri, 28 Apr 2017 13:41:58 +0200 Message-ID: Subject: Re: [PATCH 2/2] dt-bindings: pcie: Add documentation for Mediatek PCIe To: Ryder Lee List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-pci , Linux Kernel Mailing List , Rob Herring , linux-mediatek@lists.infradead.org, Bjorn Helgaas , Linux ARM Content-Type: text/plain; charset="us-ascii" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: On Fri, Apr 28, 2017 at 4:46 AM, Ryder Lee wrote: > On Thu, 2017-04-27 at 21:06 +0200, Arnd Bergmann wrote: >> On Wed, Apr 26, 2017 at 10:10 AM, Ryder Lee wrote: >> > On Tue, 2017-04-25 at 14:18 +0200, Arnd Bergmann wrote: >> >> On Sun, Apr 23, 2017 at 10:19 AM, Ryder Lee wrote: >> Are any of the registers the same at all, e.g. for MSI handling? > > No, It doesn't support MSI. All I can do is using the registers that designer provide > to me. The others are inviable for software. So I treat it as different hardware. > Furthermore, we hope that we can put all mediatek drivers together > regardless of in-house IP or lincense IP > > We have no particular IP name but just use chip name to call it. So I > will temporarily use "mediatek,gen2v1-pcie" in patch v1. I think using the chip name as in the first version of your patch name is better then, in particular since the 'gen2v1' would not be an actual version number but just say which variant got merged into mainline first. A related question would be on how general we want the binding to be. Your binding text starts out by describing that there are three root ports and what their capabilities are. If you think there might be other (existing or future) chips that use the same binding and driver, then being a little more abstract could help in the long run. Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Fri, 28 Apr 2017 13:41:58 +0200 Subject: [PATCH 2/2] dt-bindings: pcie: Add documentation for Mediatek PCIe In-Reply-To: <1493347596.29314.55.camel@mtkswgap22> References: <1492935543-18190-1-git-send-email-ryder.lee@mediatek.com> <1492935543-18190-3-git-send-email-ryder.lee@mediatek.com> <1493194205.27023.80.camel@mtkswgap22> <1493347596.29314.55.camel@mtkswgap22> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Apr 28, 2017 at 4:46 AM, Ryder Lee wrote: > On Thu, 2017-04-27 at 21:06 +0200, Arnd Bergmann wrote: >> On Wed, Apr 26, 2017 at 10:10 AM, Ryder Lee wrote: >> > On Tue, 2017-04-25 at 14:18 +0200, Arnd Bergmann wrote: >> >> On Sun, Apr 23, 2017 at 10:19 AM, Ryder Lee wrote: >> Are any of the registers the same at all, e.g. for MSI handling? > > No, It doesn't support MSI. All I can do is using the registers that designer provide > to me. The others are inviable for software. So I treat it as different hardware. > Furthermore, we hope that we can put all mediatek drivers together > regardless of in-house IP or lincense IP > > We have no particular IP name but just use chip name to call it. So I > will temporarily use "mediatek,gen2v1-pcie" in patch v1. I think using the chip name as in the first version of your patch name is better then, in particular since the 'gen2v1' would not be an actual version number but just say which variant got merged into mainline first. A related question would be on how general we want the binding to be. Your binding text starts out by describing that there are three root ports and what their capabilities are. If you think there might be other (existing or future) chips that use the same binding and driver, then being a little more abstract could help in the long run. Arnd