From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75A6CC433F5 for ; Tue, 5 Oct 2021 12:13:44 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3F4D561166 for ; Tue, 5 Oct 2021 12:13:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3F4D561166 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arndb.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=J7AK6ozXfglV1gmU8CXk/mcQ5u8c6hEl2SLyDR63tHQ=; b=ttZtYXSxFZP3CM RQvF9DDKSuvxoAP10FjIS0mM4J0VDHas/dPv/x0YEh7bDfhChLZhRA+Dbn8+QIH2MYw704kKgZF2a +eeJSJuS7wjlXRC0Ult75se/RtsbJg2snj2443UQMx7mO45xobA8ugrTexNo7tFMXnTkJB4EWyhq2 QJJEypbngJcuS7sOnfM7YZhgvYq+8jg8kisXsk6elVrLCiv6wEenwDkM5gIXANbpZg7PtFxfDT087 +Wn+ajHvWQsYrCEtPjaJ0cDTGkHU5I3ffECVXIRcCfTY5sGM0HFfuzQ7pGjYFY0snmJOTovlaFM1F 9crSpceQZinhOfQ8xMRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXjIf-00AIKw-OL; Tue, 05 Oct 2021 12:12:01 +0000 Received: from mout.kundenserver.de ([212.227.126.135]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXjIa-00AIIv-V4 for linux-arm-kernel@lists.infradead.org; Tue, 05 Oct 2021 12:11:58 +0000 Received: from mail-wr1-f48.google.com ([209.85.221.48]) by mrelayeu.kundenserver.de (mreue009 [213.165.67.97]) with ESMTPSA (Nemesis) id 1MlNgz-1nCt0x0C21-00lk5n for ; Tue, 05 Oct 2021 14:11:54 +0200 Received: by mail-wr1-f48.google.com with SMTP id v17so36918613wrv.9 for ; Tue, 05 Oct 2021 05:11:53 -0700 (PDT) X-Gm-Message-State: AOAM531CtAfnf8DK7GSHnW1Z1WYKnRe+Kz/WYwWv/9VVxdcTCVvbv/ZC ozfriH+aUr7bTvcHZMuOw31lV4LTtyN98kMbwN8= X-Google-Smtp-Source: ABdhPJyKZAdMHpLrMBZgfqZwUi5ASm7GaQHsDMg8c5SodNyRi53FvbLqB+7iLFOksNO/VBoOAtRDe23uSRQuhXUlC8M= X-Received: by 2002:a5d:4b50:: with SMTP id w16mr20877495wrs.71.1633435912933; Tue, 05 Oct 2021 05:11:52 -0700 (PDT) MIME-Version: 1.0 References: <20211005071542.3127341-1-ardb@kernel.org> <20211005071542.3127341-4-ardb@kernel.org> In-Reply-To: <20211005071542.3127341-4-ardb@kernel.org> From: Arnd Bergmann Date: Tue, 5 Oct 2021 14:11:36 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/9] ARM: optimize indirect call to handle_arch_irq for v7 cores To: Ard Biesheuvel Cc: Linux ARM , Russell King - ARM Linux , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij X-Provags-ID: V03:K1:wEt181VhqyXLiGwURR2v0BOU6+O7IZyAjBH9drYi2rnBiJP8R8y 1udTm5oLwxFTssaOh6onU0QoXS+XSqmizINbopbo6l4Zxm53zi+1sp3ajFirFGVdviHviLK myCj0ogdscEa0ExUGedPnNwUM4jQsyAPyOcIi3zhwDYmzqrswHawrGgeBY4h+WkL0iKz4R3 0U5fL0Kr56LkZE6q6+bDA== X-UI-Out-Filterresults: notjunk:1;V03:K0:msDuW3zDRQg=:xFBNqZFP5KOkaq//Gb04h8 u6IKiXsza7kd5Bu74xK39SCRzgFdgqCsAaowdDAueJg1m9dIsya8NlYRk1HxNanMZACg4/UHt v5+f3WD1uYZS0aM0s0VN62I/ovzs71wXpt3rn4g/MMTmHeNP8QKFOm3k+9sppdfqLS2LtSmJ+ 9xQymvTVPEYs9wvl7rvkikN27ReQs1jlkgU3MwYAsaEnfHhaDNeIygUqeDlDTap9cBnnRXg4+ Zzo1JpoWqpkNEWS9Nz20zAuR03Lc9nTYEgEwMcu9L4nr1t9wUZTv+OEkkJ/6MKd/rFehHgzSL wACm8Gt9OL5Dy5U4MZ0TCrrXppXW6AiObJ6JG9Ut3ylaz1NkcuoMnhsCSIXWnvZ76nXQis4aY fmHCd3+UdX2Cxvxn9BMjJeZhsnsrgJRpl3Avbp1P48Hyr216Rho6J+FQrdNKbzDvZD5/NtMdr 3HXCcmqDL52srO1eJwJf9I6BbB6FAQH1P6IWFTqLQt0WtdgDHDRHX5jdDqQL42HXHntqfz1UB nagN1XbxjuPFQ4GDsvIG36LJhHTzkfAYy06f/INS6ro3Wbmv9CxLq90kFjsYQ3t7PXn6t3znL Wn81/oSQgl47GvfHV/0sPdDtYb0dMBwqk76RT1YywvzSA+iX0gvEWBCX6GZbnELWuyYshoouS V9s6kngMHu2kakARsfJywOV76oGrv4zQmhEJ3FRnRcn7qBfx8DLSL6BUE3+PKgUiivaXy+WGt tFZ95mnU9nNiIlCKMMTLGIcaKrWeeoQ/Dwx/nTCgqmjGwqv6wOitH5IRuYzffXr+AqlMhdMm2 hZmo8Tn16clF+PfweASRBLvs08dgH5U7qdC16rIxwZppn8vw1r3KClzDntbsAzUhR4JXjpmDF eVJArTHWt9gHje0RbvuA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211005_051157_328285_864E76E1 X-CRM114-Status: GOOD ( 14.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Oct 5, 2021 at 9:15 AM Ard Biesheuvel wrote: > > The current irq_handler macro uses a literal load followed by an > explicit assignment of lr before an indirect call, both of which are > sub-optimal on recent ARM cores. Replace it by a mov_l call, which will > evaluate to a movw/movt pair on v7 cores, avoiding one of the two loads, > followed by a call to a newly introduced 'bl_m' macro, which will > evaluate to a blx instruction on cores that support it. (Setting lr > explicitly rather than via a bl or blx instruction confuses the return > address prediction that modern out-of-order cores use to speculatively > perform the function return.) > > Signed-off-by: Ard Biesheuvel Reviewed-by: Arnd Bergmann _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel