From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82171C433FE for ; Mon, 23 May 2022 11:59:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235160AbiEWL7E (ORCPT ); Mon, 23 May 2022 07:59:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235029AbiEWL7C (ORCPT ); Mon, 23 May 2022 07:59:02 -0400 Received: from mout.kundenserver.de (mout.kundenserver.de [217.72.192.73]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D4E81CB1C; Mon, 23 May 2022 04:58:59 -0700 (PDT) Received: from mail-yb1-f173.google.com ([209.85.219.173]) by mrelayeu.kundenserver.de (mreue108 [213.165.67.113]) with ESMTPSA (Nemesis) id 1Mn2iP-1nT52E0Xbj-00k5Tu; Mon, 23 May 2022 13:58:57 +0200 Received: by mail-yb1-f173.google.com with SMTP id a3so24960405ybg.5; Mon, 23 May 2022 04:58:56 -0700 (PDT) X-Gm-Message-State: AOAM532veqWEdm/lhII2OzRXSKBOkHqyrMl9LFSUykEXp2oHMti99YIr XHpY3GjPUUXf5iVhbHnpRDhlpNzVAZI6mQPiiyI= X-Google-Smtp-Source: ABdhPJww6UI3VHujKsiD4GORINdaaD7sInRUTDtpI+wOKYOknAfrhPLfgU/Tcrezf+twApFr3bW/yO+tBPWuypHA/W0= X-Received: by 2002:a25:c747:0:b0:64f:62fb:f55e with SMTP id w68-20020a25c747000000b0064f62fbf55emr13692906ybe.106.1653299558644; Mon, 23 May 2022 02:52:38 -0700 (PDT) MIME-Version: 1.0 References: <20220522155046.260146-1-tmaimon77@gmail.com> In-Reply-To: <20220522155046.260146-1-tmaimon77@gmail.com> From: Arnd Bergmann Date: Mon, 23 May 2022 11:52:22 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC To: Tomer Maimon Cc: Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Philipp Zabel , gregkh , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , Jiri Slaby , Shawn Guo , Bjorn Andersson , Geert Uytterhoeven , Marcel Ziswiler , Vinod Koul , Biju Das , Nobuhiro Iwamatsu , robert.hancock@calian.com, "nathan=20Neusch=C3=A4fer?=" , Lubomir Rintel , SoC Team , DTML , Linux Kernel Mailing List , linux-clk , "open list:SERIAL DRIVERS" , LINUXWATCHDOG , Linux ARM Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:K2R+uAYYvavIOQlbMP3GLCeRXnol3L+0VpJyijg1+MUeIWxNLX7 lNFWjJX6Cv4Is7pwQkqi+RoqhDoEwUE378KnS4nslJeKUWa4650jXF+D2LPeoM1XCs7QGvw MpKbPu/uiR2Rfhau1JOLSKA93AIsrltZjMkDphSwbaLua95IcOfLpqQJfs4U5yNJRYWg+gh NgsZ5HOHmJaiPgTfsswuA== X-UI-Out-Filterresults: notjunk:1;V03:K0:leD/+n0eHbs=:mDqVauFrvVHcOs81g3yIXC MTLRWcCg76/Ryh14JfUC37tXuFN4ICUccXdk9dp84bpNcEczf10bpN3I6sghDBi1BDiHoM4No RtQ3wUYCkbV084hfn41QnJJytlO2/+J0mt8TZXU6gx1pe7NXfWLw4xO3xGNgLbK3C60nAyPVP LaA0UumGtVwOpWDyuKILdH+/eAVuL7cjyU86OeybvtAtxOWC4OG4EnUjYFVzuZskeJVgNnahr jaCsklePVvLqWNi9VYhTl7lm84o/FlFu5hqT2aQHtV9GGlQ5n6otkcrUI6c1uWG3CLGa+EOR3 Vf1upv32PaGG9VWIXIWuQJuGMzmT8JYJAG7w3zFbCQzW0LQSnb21N1hwIGkLb16C414gvByce 68Osn/r8eDXqCs804PL69yZYBkVNXdrbHM9JcMPvnoPDkLoqbiX4fEAzOhyeeTo7i6/4QCfKy MZBEdP7cABkJYQpyy9UCrD2XRO2TmKYYEp85jeycA0hwh+gpHfwlLYkK1PbuExIngScxRRkYt BcNQ0CR3GDph53q81ianNmLrRz+rBFeH+LyTwZvg3h1BE+lHqvaxvC+4lf/yNR978FYaGQWuc LxYojiRfRiGy3dU8UAcG2NCv5O+iQLMGLIlBdi0UEtnlk0JLo6PB5hry1yOvVzPjj2W+hHlBa USUxfhJTxxMdMWG8Ia31kgurB1rHC1sEoxNSFBalWMAvqjTsDtmuzX37SKR/bLcsryFd9khpS 3IOfue31wKTaozFrI+ue4XmzXp9bt18Q+2WX6LybAxm3npWpYu64o/0AeP2xWQH03bX4YA3FJ Rqc2yA0Llk0nSzi+0Cv+5xpHytwSB7WnTpCVOlSE1KrTQbHr+oiip/Lxb4JkpiEClEqBsU7K5 smDV24Nm2eKEMbW1WwgFKql5lxbIZ2nSJc4e/IlMQ= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 22, 2022 at 5:50 PM Tomer Maimon wrote: > > This patchset adds initial support for the Nuvoton > Arbel NPCM8XX Board Management controller (BMC) SoC family. > > The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. > The NPCM8XX computing subsystem comprises a quadcore ARM > Cortex A35 ARM-V8 architecture. > > This patchset adds minimal architecture and drivers such as: > Clocksource, Clock, Reset, and WD. > > Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. > > This patchset was tested on the Arbel NPCM8XX evaluation board. Thanks for your submission. Please note a few things about the process here: - The merge window is currently open, which means a lo Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Tomer Maimon (19): dt-bindings: timer: npcm: Add npcm845 compatible string clocksource: timer-npcm7xx: Add NPCM845 timer support dt-bindings: serial: 8250: Add npcm845 compatible string tty: serial: 8250: Add NPCM845 UART support dt-bindings: watchdog: npcm: Add npcm845 compatible string watchdog: npcm_wdt: Add NPCM845 watchdog support dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: add syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family supportt of maintainers won't be reviewing your patches at the moment. It may be better to wait for the -rc1 to be out before sending out v2 - don't send your patches to soc@kernel.org unless you want me to pick them up into the soc tree and they have been reviewed already. The series is clearly still under review at the moment, and I expect it to go through a few revisions first. - gmail marked your emails as possible spam for me. I don't know what happened here, but you may want to look into this to ensure that everybody receives it. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Tomer Maimon (19): dt-bindings: timer: npcm: Add npcm845 compatible string clocksource: timer-npcm7xx: Add NPCM845 timer support dt-bindings: serial: 8250: Add npcm845 compatible string tty: serial: 8250: Add NPCM845 UART support dt-bindings: watchdog: npcm: Add npcm845 compatible string watchdog: npcm_wdt: Add NPCM845 watchdog support dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: add syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family support - For an initial platform submission, I can merge the clk/clocksource/serial/reset drivers along with the platform if they have an Ack from the subsystem maintainers. I would normally not include the watchdog patch in this as it's not essential, but I suppose that it's fine if you only do a oneline change and it has an Ack. If you have other nonessential drivers that need changes, best submit them separately though. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 616A6C433F5 for ; Mon, 23 May 2022 11:26:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kNJA5G8YvInkLxREI/NPrXHKOdoXkDHAb63m/fTtXx0=; b=PiXiOHBV32RTQ5 k2D5egBsFVu52TKKIBG55q86RaCS4ZPNa4Y2PT1MHTiBIn4KmIotylQGLDdPIh3+Pgs6BlJXye6yU qPiWL3kUmtWVNrl6AJ1CB1BwNoEMXnalEpjoh+GmZaVHEOvwAMa5/ktrytglIwqQgFMWn+Gy2S9i2 3gmIculZyN7wzo4OSdJeJHfzNlLhHC0jDVk+q9Vg30gyqLxrQE4ApNLZJkt2dL1lj2G9+27th10IL ykl2rTUN3v3na0PrP9mk0VflptrKAfUknhGxvfM9WdQQSCMrW1bS1hyCDRhS2qkhRAByV8wWZdZCk nNLrM4Vzrm98lOTiTSHw==; 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Mon, 23 May 2022 02:52:38 -0700 (PDT) MIME-Version: 1.0 References: <20220522155046.260146-1-tmaimon77@gmail.com> In-Reply-To: <20220522155046.260146-1-tmaimon77@gmail.com> From: Arnd Bergmann Date: Mon, 23 May 2022 11:52:22 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC To: Tomer Maimon Cc: Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Philipp Zabel , gregkh , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , Jiri Slaby , Shawn Guo , Bjorn Andersson , Geert Uytterhoeven , Marcel Ziswiler , Vinod Koul , Biju Das , Nobuhiro Iwamatsu , robert.hancock@calian.com, "nathan=20Neusch=C3=A4fer?=" , Lubomir Rintel , SoC Team , DTML , Linux Kernel Mailing List , linux-clk , "open list:SERIAL DRIVERS" , LINUXWATCHDOG , Linux ARM X-Provags-ID: V03:K1:7TxIF8IBxA0jygzLSzK6/bUxUUdWIgoaS3S1AV9ZCijUqwC19GI 41WToywlVf/DqoC7iXk00OLvOX55bMQyfICYrehj3ys4rpe+N6JW/WnuQxGNjL2+8AlmHa2 aqr7XH2y2RYyvCeaMNS+e8NI3yNcvj7C3u5xm0BiUUihSQms3Y7bBrgl949knEiQFElwOn2 CB2wt2mOmKU2oLiLR/cYg== X-UI-Out-Filterresults: notjunk:1;V03:K0:Ij35xeDkGgE=:kzIAKP09xaAvRiR0IC2Q5i fH8b20rYVKq1uyrekXFB11fiZcksnPMVgPjHVKUSuh+4ZgATmJUNhWqPXnmqMrTtdqwTi4YzS PzW0xKtRcfnyHTi4BAxo0XpSRvY2vnMGyyO51Po+V3pXwkefwwmbRY1nikGYZhUqFqU8wXQTu OK7CTuW+AkRZkwgVTkdT5DCG46tZjHf8X4K1fsxWDSEr/QjUZH6va3YounCw0HgsjMIkEv0Z9 2EnZIjcOewWiETMRPEW/wb2W32hdsQhG1hEGkPeuT4/EsF40ltPlCu9y29XVhhUzTpqLTjcPm C6KOx5YOwDiK3/t9uecX9XMLPRSMCRouuBNYZE5OacR+GzxbGlVdnJI7PXYF6hjfmB7hPmgNo yOkL9iD4PY8tduUa10dwM7HyosAkkf1/XZ//7/o5OGRGonhEBSLp3njUeWI2qfPp6lgsf3jeK 5CsyDPtyKGALu1qRrVweIr13mOTztltztzURKL4TjMXCQ7Gy2EDSxK4TNThUpswFXhO+lB1mH bTG86VsR+2dfPwcSX6bKZ2bO9npmVY5I02UHYrywaWzB06sS7mfej0bq98DBeiZ4xojoxx98V /exXFXQdW2V99vZIJ+rSNgCeHaWQ3FdIP0w8kMKXtTRGIBpEW6a7YiUdr2an4iryfFjY8vSj1 xMPfqgkTzCDBTymvkzbC5kR3H8CwMVZo8GqwgBnU4KUe7EK4/3FbzMP7h4w9iQA7rl8vUWphY L6iiQd1EhEFfuVxKSfiYXNktAy37sYL4kjF8CfgLe5VVQ/zZ0SW/yQOB+gZNLIBAo6idCKlfj x30o98jeeOP+7nit9gEdRlO5lR3CR9PLIaDYAok9snIphvEMezYzxLtjR5Z5fKS2FsWXL+2qZ JA1xFESXo++oY3iTcJng== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220523_034151_248396_A4622481 X-CRM114-Status: GOOD ( 23.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, May 22, 2022 at 5:50 PM Tomer Maimon wrote: > > This patchset adds initial support for the Nuvoton > Arbel NPCM8XX Board Management controller (BMC) SoC family. > > The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. > The NPCM8XX computing subsystem comprises a quadcore ARM > Cortex A35 ARM-V8 architecture. > > This patchset adds minimal architecture and drivers such as: > Clocksource, Clock, Reset, and WD. > > Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. > > This patchset was tested on the Arbel NPCM8XX evaluation board. Thanks for your submission. Please note a few things about the process here: - The merge window is currently open, which means a lo Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Tomer Maimon (19): dt-bindings: timer: npcm: Add npcm845 compatible string clocksource: timer-npcm7xx: Add NPCM845 timer support dt-bindings: serial: 8250: Add npcm845 compatible string tty: serial: 8250: Add NPCM845 UART support dt-bindings: watchdog: npcm: Add npcm845 compatible string watchdog: npcm_wdt: Add NPCM845 watchdog support dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: add syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family supportt of maintainers won't be reviewing your patches at the moment. It may be better to wait for the -rc1 to be out before sending out v2 - don't send your patches to soc@kernel.org unless you want me to pick them up into the soc tree and they have been reviewed already. The series is clearly still under review at the moment, and I expect it to go through a few revisions first. - gmail marked your emails as possible spam for me. I don't know what happened here, but you may want to look into this to ensure that everybody receives it. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Tomer Maimon (19): dt-bindings: timer: npcm: Add npcm845 compatible string clocksource: timer-npcm7xx: Add NPCM845 timer support dt-bindings: serial: 8250: Add npcm845 compatible string tty: serial: 8250: Add NPCM845 UART support dt-bindings: watchdog: npcm: Add npcm845 compatible string watchdog: npcm_wdt: Add NPCM845 watchdog support dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: add syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family support - For an initial platform submission, I can merge the clk/clocksource/serial/reset drivers along with the platform if they have an Ack from the subsystem maintainers. I would normally not include the watchdog patch in this as it's not essential, but I suppose that it's fine if you only do a oneline change and it has an Ack. If you have other nonessential drivers that need changes, best submit them separately though. Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel