From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1736AC433E0 for ; Tue, 16 Feb 2021 11:22:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BEC3564DF0 for ; Tue, 16 Feb 2021 11:22:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230145AbhBPLW3 (ORCPT ); Tue, 16 Feb 2021 06:22:29 -0500 Received: from mail.kernel.org ([198.145.29.99]:38414 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229807AbhBPLWD (ORCPT ); Tue, 16 Feb 2021 06:22:03 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 586E964DEC; Tue, 16 Feb 2021 11:21:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1613474482; bh=sGdysOLwQ/vMTi6/cVtKA8MKh2ozaYEspwLLEkybZGg=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=TQYHRnVe7JndLjnuQU4eFOkLPlP7JYk78oQVaYcBjR7RNODDjKJyeAIgF5ahXUirA ApKGzblkY79ikREmqs8iyMl5FJEsBZkoQJI62CSiLMinyqqYqMUQraS/A7jVm5TiLZ lLyCWLoGhmOyF8Nexwqc+Cpwhb559ectSEdXwKP2wpjhIn2pFuct0MbkSdSHl04uKX FJoXYjyJK+sSFBYdOzMVMwTRfWDS02gjazD8cGT3yDjG2Xtkt+BDZJRO+uiawXmPrf 3p4GIPNtBfuKs8MH3x3iEi4FEJZ5QYx2rjSYOI/vm6rqOGhB4aywkDNYne18WUPFk5 b23sB6xz2QV5w== Received: by mail-ot1-f51.google.com with SMTP id c16so8720140otp.0; Tue, 16 Feb 2021 03:21:22 -0800 (PST) X-Gm-Message-State: AOAM530Y/CQy5G7fcilvMPQUGhWYYyz77PvQ71TKJcu5fB38IJ4zIWoy Jn5CWsEBFYettoogq4kvR0admroSvVM7U2CzOcc= X-Google-Smtp-Source: ABdhPJyv2CYeHeZ1SBVRBNXR0A/V33lDQYMOTu+CjmWbeCC6//6Y/a53hTr8YDYVa3GMct6RQ8aW7uE7pDs+7W78NRw= X-Received: by 2002:a05:6830:18e6:: with SMTP id d6mr15005260otf.251.1613474481601; Tue, 16 Feb 2021 03:21:21 -0800 (PST) MIME-Version: 1.0 References: <20210215121713.57687-1-marcan@marcan.st> <20210215121713.57687-15-marcan@marcan.st> In-Reply-To: From: Arnd Bergmann Date: Tue, 16 Feb 2021 12:21:05 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 14/25] dt-bindings: interrupt-controller: Add DT bindings for apple-aic To: Mark Kettenis Cc: Hector Martin , Linux ARM , Marc Zyngier , Rob Herring , Olof Johansson , Krzysztof Kozlowski , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Will Deacon , Linus Walleij , Mark Rutland , DTML , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 16, 2021 at 12:00 PM Mark Kettenis wrote: > > From: Arnd Bergmann > > Date: Tue, 16 Feb 2021 10:41:11 +0100 > > > > On Mon, Feb 15, 2021 at 1:17 PM Hector Martin wrote: > > > + > > > + The 2nd cell contains the interrupt number. > > > + - HW IRQs: interrupt number > > > + - FIQs: > > > + - 0: physical HV timer > > > + - 1: virtual HV timer > > > + - 2: physical guest timer > > > + - 3: virtual guest timer > > > > I wonder if you could just model the FIQ as a single shared level interrupt > > (which is essentially what it is), and have every driver that uses it do a > > request_irq() on the same IRQ number. > > > > This would avoid having to come up with a fake binding for it, and simplify > > the implementation that then no longer has to peek into each interrupt > > source. > > That would tie the binding more closely to the implementation as it > would remove the option of peeking at the interrupt source. I don't think having the binding match the implementation is a bad thing ;-) If a future SoC variant handles it differently, it will need a binding update anyway. > And wouldn't it mean that the arch_timer driver would need to know whether > the interrupt is shared or not? Indeed, it does require each driver to pass IRQF_SHARED, and be prepared to be called when no irq is pending (returning IRQ_NONE otherwise), so a downside would be that this requires changing the bindings for the timer and anything else that ends up using FIQ later. It may be possible to just always pass IRQF_SHARED when registering the arch timer handler, not sure if there are any downsides in case for the normal (non-shared) case. This is a drawback, but I still find it a little cleaner than having to encode information about the individual irq sources into the irqchip driver. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F609C433E0 for ; Tue, 16 Feb 2021 11:22:56 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 52E5D64DE0 for ; Tue, 16 Feb 2021 11:22:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 52E5D64DE0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; 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Tue, 16 Feb 2021 03:21:21 -0800 (PST) MIME-Version: 1.0 References: <20210215121713.57687-1-marcan@marcan.st> <20210215121713.57687-15-marcan@marcan.st> In-Reply-To: From: Arnd Bergmann Date: Tue, 16 Feb 2021 12:21:05 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 14/25] dt-bindings: interrupt-controller: Add DT bindings for apple-aic To: Mark Kettenis X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210216_062124_533115_301C33D0 X-CRM114-Status: GOOD ( 24.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , DTML , Tony Lindgren , Marc Zyngier , Linus Walleij , Hector Martin , "linux-kernel@vger.kernel.org" , Krzysztof Kozlowski , Alexander Graf , Olof Johansson , Mohamed Mediouni , Will Deacon , Linux ARM , Stan Skowronek Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Feb 16, 2021 at 12:00 PM Mark Kettenis wrote: > > From: Arnd Bergmann > > Date: Tue, 16 Feb 2021 10:41:11 +0100 > > > > On Mon, Feb 15, 2021 at 1:17 PM Hector Martin wrote: > > > + > > > + The 2nd cell contains the interrupt number. > > > + - HW IRQs: interrupt number > > > + - FIQs: > > > + - 0: physical HV timer > > > + - 1: virtual HV timer > > > + - 2: physical guest timer > > > + - 3: virtual guest timer > > > > I wonder if you could just model the FIQ as a single shared level interrupt > > (which is essentially what it is), and have every driver that uses it do a > > request_irq() on the same IRQ number. > > > > This would avoid having to come up with a fake binding for it, and simplify > > the implementation that then no longer has to peek into each interrupt > > source. > > That would tie the binding more closely to the implementation as it > would remove the option of peeking at the interrupt source. I don't think having the binding match the implementation is a bad thing ;-) If a future SoC variant handles it differently, it will need a binding update anyway. > And wouldn't it mean that the arch_timer driver would need to know whether > the interrupt is shared or not? Indeed, it does require each driver to pass IRQF_SHARED, and be prepared to be called when no irq is pending (returning IRQ_NONE otherwise), so a downside would be that this requires changing the bindings for the timer and anything else that ends up using FIQ later. It may be possible to just always pass IRQF_SHARED when registering the arch timer handler, not sure if there are any downsides in case for the normal (non-shared) case. This is a drawback, but I still find it a little cleaner than having to encode information about the individual irq sources into the irqchip driver. Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel