On Sat, Oct 19, 2019 at 10:24 PM Alexander Sverdlin
<alexander.sverdlin@gmail.com> wrote:
> On Sat, 19 Oct 2019 22:08:40 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
>
> > > # cat /proc/interrupts
> > >            CPU0
> > >  39:        146       VIC   7 Edge      eth0
> > >  51:     162161       VIC  19 Edge      ep93xx timer
> > >  52:        139       VIC  20 Edge      uart-pl010
> > >  53:          4       VIC  21 Edge      ep93xx-spi
> > >  60:          0       VIC  28 Edge      ep93xx-i2s
> > > Err:          0
> >
> > I guess that is partial success: some irqs do work ;-)
>
> Yep, VIC1 is working, while VIC0 is not.
>
> > The two interrupts that did not get registered are for the
> > dmaengine driver, and that makes sense given the error
> > message about the DMA not working. No idea how
> > that would be a result of the irq changes though.
>
> Seems, that it has exposed some incompatibilities of
> starting IRQ 0 in EP93xx platform fir VIC0 and VIC code
> itself, which assumes 0 means "auto assignment" (refer
> to vic_init()).

Ah, that makes sense. so all interrupt numbers need to
be shifted by a fixed number (e.g. 1) like we did for
other platforms (see attachment).

      Arnd