From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D45EC433DB for ; Mon, 29 Mar 2021 01:20:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F66E61941 for ; Mon, 29 Mar 2021 01:20:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230271AbhC2BUT (ORCPT ); Sun, 28 Mar 2021 21:20:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230421AbhC2BTs (ORCPT ); Sun, 28 Mar 2021 21:19:48 -0400 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 120D4C061756 for ; Sun, 28 Mar 2021 18:19:48 -0700 (PDT) Received: by mail-ej1-x629.google.com with SMTP id e14so16844405ejz.11 for ; Sun, 28 Mar 2021 18:19:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=rTJmlPXK9Et5rO0omoD1ZFN/iK1wPaRQINj5TjeHtqQ=; b=lYiiziRBmj2GB+IbKZlbmM9RX2WNr44mGVjf31mYHMeckiXJmv45Kudaf2dzpdNCjZ wZ6MRjv6ftUGjzL0AXJ7lrqY3+vVZeMvz1imVpT+DJOKu+M0LGS35eJTDAOoQPTIee/8 Boc+gAFxtWEOqVF8C3FD+KREqeiCMHX/Gz+iDXIktn5TH8kbCJsexe+mY49KWZ39Lsl3 gsR/Er3LcL3QbGv9BWpbmuYDjfDau2aiwZ0LClhsC+B3Pifg8eLrCcM4rAS9/3JKlRHU Via8Daz2h03vS9Vg0fjtW4GehHNIpmla/zKRYj0+fVh2/RfSdyVIZgWH71G92DdBEZkl QkqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=rTJmlPXK9Et5rO0omoD1ZFN/iK1wPaRQINj5TjeHtqQ=; b=DIii5RP7jTO3tVzVd/aYx6p+RnWyIgWnU7I9zx4gEKveO3D569nR1CVgk106qpdyCk Fk1hhjvbw5+p873IW3BIHJzu52YUmr7x052nAJroqwZaa8NYEwATsP89i1gdEDiwWEUp SdV4XzLfAbxkUoEcTaWGH22b1WVQGA5heSQ7BqrqT40WP3XjT5MU+Q6ctmlmsgItn2K7 GmWgoN+B/xTXKTT4HmE+cgCqpG1MnLS02ifKDrTDWzNwXOzAn62Pnu+rqa7Qh7h5QS13 07u9DZrlNL+qJzu8/84GwRUB50mjA5sNZbqQHFr1Cdg8iGDKi6V5s4MCAAkV47LQnV0z WMBA== X-Gm-Message-State: AOAM5316P3aPk4rwg9O2CO+7Drkq0QbSHW41JqWCkoV2CMOZAObvR+4o eyPgoIq7SkwAlHTmiHAK6ZtuhXFRSVP7nZtO5/0pcA== X-Google-Smtp-Source: ABdhPJxUCgM9piyX/k7qbNVhsdRINxGdhoMnzDUbCOh+nLKRCALtdIKcq2Gil/lEH55ZxVLoJTsGdlPCF5JPUuvU/Jo= X-Received: by 2002:a17:906:52d0:: with SMTP id w16mr26022772ejn.172.1616980786565; Sun, 28 Mar 2021 18:19:46 -0700 (PDT) MIME-Version: 1.0 References: <20210304034141.7062-1-brad@pensando.io> <20210304034141.7062-2-brad@pensando.io> In-Reply-To: From: Brad Larson Date: Sun, 28 Mar 2021 18:19:35 -0700 Message-ID: Subject: Re: [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control To: Andy Shevchenko Cc: linux-arm Mailing List , Arnd Bergmann , Linus Walleij , Bartosz Golaszewski , Mark Brown , Serge Semin , Adrian Hunter , Ulf Hansson , Olof Johansson , "open list:GPIO SUBSYSTEM" , linux-spi , linux-mmc , devicetree , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Sun, Mar 7, 2021 at 11:21 AM Andy Shevchenko wrote: > > On Thu, Mar 4, 2021 at 4:40 PM Brad Larson wrote: > > > > This GPIO driver is for the Pensando Elba SoC which > > provides control of four chip selects on two SPI busses. > > > +config GPIO_ELBA_SPICS > > + bool "Pensando Elba SPI chip-select" > > Can't it be a module? Why? All Elba SoC based platforms require this driver to be built-in to boot and removing the module would result in a variety of exceptions/errors. > > + depends on ARCH_PENSANDO_ELBA_SOC > > + help > > + Say yes here to support the Pensndo Elba SoC SPI chip-select driver > > Please give more explanation what it is and why users might need it, > and also tell users how the module will be named (if there is no > strong argument why it can't be a module). > Fixed the typo. > > +#include > > It's not used here, but you missed mod_devicetable.h. Removed . There is no dependency on mod_devicetable.h. > ... > > > +/* > > + * pin: 3 2 | 1 0 > > + * bit: 7------6------5------4----|---3------2------1------0 > > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr > > + * ssi1 | ssi0 > > + */ > > +#define SPICS_PIN_SHIFT(pin) (2 * (pin)) > > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin)) > > > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin)) > > Isn't it easier to define as ((value) << (2 * (pin) + 1) | BIT(2 * (pin))) > > ... > > > +struct elba_spics_priv { > > + void __iomem *base; > > + spinlock_t lock; > > > + struct gpio_chip chip; > > If you put it as a first member a container_of() becomes a no-op. OTOH > dunno if there is any such container_of() use in the code. > There is no use of container_of() > > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Hmm... Is it really acceptable error code here? > > > +static int elba_spics_direction_input(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Ditto. > Changed both to -ENOTSUPP. > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + p->base = devm_ioremap_resource(&pdev->dev, res); > > p->base = devm_platform_ioremap_resource(pdev, 0); Implementation follows devm_ioremap_resource() example in lib/devres.c. > > + if (IS_ERR(p->base)) { > > > + dev_err(&pdev->dev, "failed to remap I/O memory\n"); > > Duplicate noisy message. > > > + return PTR_ERR(p->base); > > + } > > > + ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p); > > + if (ret) { > > + dev_err(&pdev->dev, "unable to add gpio chip\n"); > > > + return ret; > > + } > > + > > + dev_info(&pdev->dev, "elba spics registered\n"); > > + return 0; > > if (ret) > dev_err(...); > return ret; Cleaned this up in patchset v2. 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Mar 7, 2021 at 11:21 AM Andy Shevchenko wrote: > > On Thu, Mar 4, 2021 at 4:40 PM Brad Larson wrote: > > > > This GPIO driver is for the Pensando Elba SoC which > > provides control of four chip selects on two SPI busses. > > > +config GPIO_ELBA_SPICS > > + bool "Pensando Elba SPI chip-select" > > Can't it be a module? Why? All Elba SoC based platforms require this driver to be built-in to boot and removing the module would result in a variety of exceptions/errors. > > + depends on ARCH_PENSANDO_ELBA_SOC > > + help > > + Say yes here to support the Pensndo Elba SoC SPI chip-select driver > > Please give more explanation what it is and why users might need it, > and also tell users how the module will be named (if there is no > strong argument why it can't be a module). > Fixed the typo. > > +#include > > It's not used here, but you missed mod_devicetable.h. Removed . There is no dependency on mod_devicetable.h. > ... > > > +/* > > + * pin: 3 2 | 1 0 > > + * bit: 7------6------5------4----|---3------2------1------0 > > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr > > + * ssi1 | ssi0 > > + */ > > +#define SPICS_PIN_SHIFT(pin) (2 * (pin)) > > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin)) > > > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin)) > > Isn't it easier to define as ((value) << (2 * (pin) + 1) | BIT(2 * (pin))) > > ... > > > +struct elba_spics_priv { > > + void __iomem *base; > > + spinlock_t lock; > > > + struct gpio_chip chip; > > If you put it as a first member a container_of() becomes a no-op. OTOH > dunno if there is any such container_of() use in the code. > There is no use of container_of() > > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Hmm... Is it really acceptable error code here? > > > +static int elba_spics_direction_input(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Ditto. > Changed both to -ENOTSUPP. > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + p->base = devm_ioremap_resource(&pdev->dev, res); > > p->base = devm_platform_ioremap_resource(pdev, 0); Implementation follows devm_ioremap_resource() example in lib/devres.c. > > + if (IS_ERR(p->base)) { > > > + dev_err(&pdev->dev, "failed to remap I/O memory\n"); > > Duplicate noisy message. > > > + return PTR_ERR(p->base); > > + } > > > + ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p); > > + if (ret) { > > + dev_err(&pdev->dev, "unable to add gpio chip\n"); > > > + return ret; > > + } > > + > > + dev_info(&pdev->dev, "elba spics registered\n"); > > + return 0; > > if (ret) > dev_err(...); > return ret; Cleaned this up in patchset v2. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel