From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9711C432BE for ; Mon, 23 Aug 2021 01:10:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B69A3611C8 for ; Mon, 23 Aug 2021 01:10:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234596AbhHWBLP (ORCPT ); Sun, 22 Aug 2021 21:11:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234501AbhHWBLO (ORCPT ); Sun, 22 Aug 2021 21:11:14 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D11EAC061756 for ; Sun, 22 Aug 2021 18:10:28 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id w5so33440870ejq.2 for ; Sun, 22 Aug 2021 18:10:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=9WpSLT/7mvQ0ddiub005tUp0P5hRLIeXnnTQ1S0shMs=; b=s3xm8mzSflJhA7DLhHG0BDMFRU4hpe+uocF9gcVx7xNGhAMWbe/WjJUeIzUx5QaejL +SqM3MUb7wlpsSuhnUNpGkgFf1T7nZHK/Cl0eagk2Flvh4RxkTxkfkZl+LGkMSbsKnDK 0mWIkOcazsClJAKIteA3RIWRHlzfKT24IXQbbFoO280Okc2uw5kO3UBohXqQ/zvfYLP/ 0CSAARIGVOXsq2qEHSr5sl2PxxvxqHAvkFLjK6Pb/by65FaYLU3biakM2ojHvEJJ8Z95 K5gHLsteQ9HAMrEQpo9SheV2gMbTfmciQU3iHzwuISsQxwxQNerdw0UxpPUQ8A3J1zqU +2wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=9WpSLT/7mvQ0ddiub005tUp0P5hRLIeXnnTQ1S0shMs=; b=QuD2gOmPuum0D6f/iriP4+N4gioNKwCI9nb8cCLc5so+MuHO8DHo26xjKT9CHg/6Vh rmxJUYpelEYEQwHWlzNCCxcKx7NDaSJ9AbLulLe8QV6OKI0pHjjA0GqwSNpKds7RTC3+ Y4HP6pprFj4uGG+0pTebsJw4q+/e20Z184ZP71IuDxGcxGs0YqBCNHpVYvWOtoAaaexR EDKJSb0qFXXd1ZPvXpVcZwnfA8HFGHR9xVW42NTDMcPxEKCAqJ6ctEWfWzlOh12o6Mjx R2+BiYV9ghjOpSqFJSbAi31xXcxnztR/ZQNQ9rqe3d4Z+SUNdhGM5V9BvBUF8sArxa1x bR3A== X-Gm-Message-State: AOAM5326rY5raKN2RmtKDT5WmyNExVSo/Pcv64UOUWrartk5GyBmSoQ3 +XmI4EMxxQ0C3ExeJxbCWSjxJLvrkh1gGldy9G2IjA== X-Google-Smtp-Source: ABdhPJwoUhTy7MVM+JzeHkwt6ZjUT1Elkvq3lKIh0CVbdlBKuysswcQBu6QWowS6l3a9c2D870aLZs6VYegUJyeZ+6w= X-Received: by 2002:a17:906:1701:: with SMTP id c1mr32915513eje.425.1629681027447; Sun, 22 Aug 2021 18:10:27 -0700 (PDT) MIME-Version: 1.0 References: <20210304034141.7062-1-brad@pensando.io> <20210304034141.7062-2-brad@pensando.io> In-Reply-To: From: Brad Larson Date: Sun, 22 Aug 2021 18:10:16 -0700 Message-ID: Subject: Re: [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control To: Andy Shevchenko Cc: linux-arm Mailing List , Arnd Bergmann , Linus Walleij , Bartosz Golaszewski , Mark Brown , Serge Semin , Adrian Hunter , Ulf Hansson , Olof Johansson , "open list:GPIO SUBSYSTEM" , linux-spi , linux-mmc , devicetree , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Andy, On Sun, Mar 7, 2021 at 11:21 AM Andy Shevchenko wrote: > > On Thu, Mar 4, 2021 at 4:40 PM Brad Larson wrote: > > > > This GPIO driver is for the Pensando Elba SoC which > > provides control of four chip selects on two SPI busses. > > I will try to avoid repeating otheris in their reviews, but my comments below. > > ... > > > +config GPIO_ELBA_SPICS > > + bool "Pensando Elba SPI chip-select" > > Can't it be a module? Why? > > > + depends on ARCH_PENSANDO_ELBA_SOC > > + help > > + Say yes here to support the Pensndo Elba SoC SPI chip-select driver > > Please give more explanation what it is and why users might need it, > and also tell users how the module will be named (if there is no > strong argument why it can't be a module). > > ... > > > +#include > > It's not used here, but you missed mod_devicetable.h. Based on the feedback I realized this should not be a loadable module. I should be using builtin_platform_driver(elba_spics_driver). Currently I have this for gpio/Kconfig config GPIO_ELBA_SPICS def_bool y depends on ARCH_PENSANDO_ELBA_SOC || COMPILE_TEST > > +/* > > + * pin: 3 2 | 1 0 > > + * bit: 7------6------5------4----|---3------2------1------0 > > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr > > + * ssi1 | ssi0 > > + */ > > +#define SPICS_PIN_SHIFT(pin) (2 * (pin)) > > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin)) > > > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin)) > > Isn't it easier to define as ((value) << (2 * (pin) + 1) | BIT(2 * (pin))) Both are functionally correct. I don't have a preference, do you want this change? > > +struct elba_spics_priv { > > + void __iomem *base; > > + spinlock_t lock; > > > + struct gpio_chip chip; > > If you put it as a first member a container_of() becomes a no-op. OTOH > dunno if there is any such container_of() use in the code. There is no use of container_of() for this structure > > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Hmm... Is it really acceptable error code here? No it's not, thanks. Changed to -ENOTSUPP as gpio output direction only is supported. > > +static int elba_spics_direction_input(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Ditto. Changed to ENOTSUPP > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + p->base = devm_ioremap_resource(&pdev->dev, res); > > p->base = devm_platform_ioremap_resource(pdev, 0); Changed to single call to devm_platform_ioremap_resource(pdev, 0) > > + if (IS_ERR(p->base)) { > > > + dev_err(&pdev->dev, "failed to remap I/O memory\n"); > > Duplicate noisy message. Removed extra log message > > + return PTR_ERR(p->base); > > + } > > > + ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p); > > + if (ret) { > > + dev_err(&pdev->dev, "unable to add gpio chip\n"); > > > + return ret; > > + } > > + > > + dev_info(&pdev->dev, "elba spics registered\n"); > > + return 0; > > if (ret) > dev_err(...); > return ret; Yes, made this change and will include in v3 patchset --- a/drivers/gpio/gpio-elba-spics.c +++ b/drivers/gpio/gpio-elba-spics.c @@ -91,13 +91,9 @@ static int elba_spics_probe(struct platform_device *pdev) ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p); - if (ret) { + if (ret) dev_err(&pdev->dev, "unable to add gpio chip\n"); - return ret; - } - - dev_info(&pdev->dev, "elba spics registered\n"); - return 0; + return ret; Regards, Brad From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B000AC4338F for ; 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Sun, 22 Aug 2021 18:10:27 -0700 (PDT) MIME-Version: 1.0 References: <20210304034141.7062-1-brad@pensando.io> <20210304034141.7062-2-brad@pensando.io> In-Reply-To: From: Brad Larson Date: Sun, 22 Aug 2021 18:10:16 -0700 Message-ID: Subject: Re: [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control To: Andy Shevchenko Cc: linux-arm Mailing List , Arnd Bergmann , Linus Walleij , Bartosz Golaszewski , Mark Brown , Serge Semin , Adrian Hunter , Ulf Hansson , Olof Johansson , "open list:GPIO SUBSYSTEM" , linux-spi , linux-mmc , devicetree , Linux Kernel Mailing List X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210822_181032_189458_9A11949B X-CRM114-Status: GOOD ( 34.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andy, On Sun, Mar 7, 2021 at 11:21 AM Andy Shevchenko wrote: > > On Thu, Mar 4, 2021 at 4:40 PM Brad Larson wrote: > > > > This GPIO driver is for the Pensando Elba SoC which > > provides control of four chip selects on two SPI busses. > > I will try to avoid repeating otheris in their reviews, but my comments below. > > ... > > > +config GPIO_ELBA_SPICS > > + bool "Pensando Elba SPI chip-select" > > Can't it be a module? Why? > > > + depends on ARCH_PENSANDO_ELBA_SOC > > + help > > + Say yes here to support the Pensndo Elba SoC SPI chip-select driver > > Please give more explanation what it is and why users might need it, > and also tell users how the module will be named (if there is no > strong argument why it can't be a module). > > ... > > > +#include > > It's not used here, but you missed mod_devicetable.h. Based on the feedback I realized this should not be a loadable module. I should be using builtin_platform_driver(elba_spics_driver). Currently I have this for gpio/Kconfig config GPIO_ELBA_SPICS def_bool y depends on ARCH_PENSANDO_ELBA_SOC || COMPILE_TEST > > +/* > > + * pin: 3 2 | 1 0 > > + * bit: 7------6------5------4----|---3------2------1------0 > > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr > > + * ssi1 | ssi0 > > + */ > > +#define SPICS_PIN_SHIFT(pin) (2 * (pin)) > > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin)) > > > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin)) > > Isn't it easier to define as ((value) << (2 * (pin) + 1) | BIT(2 * (pin))) Both are functionally correct. I don't have a preference, do you want this change? > > +struct elba_spics_priv { > > + void __iomem *base; > > + spinlock_t lock; > > > + struct gpio_chip chip; > > If you put it as a first member a container_of() becomes a no-op. OTOH > dunno if there is any such container_of() use in the code. There is no use of container_of() for this structure > > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Hmm... Is it really acceptable error code here? No it's not, thanks. Changed to -ENOTSUPP as gpio output direction only is supported. > > +static int elba_spics_direction_input(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > Ditto. Changed to ENOTSUPP > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + p->base = devm_ioremap_resource(&pdev->dev, res); > > p->base = devm_platform_ioremap_resource(pdev, 0); Changed to single call to devm_platform_ioremap_resource(pdev, 0) > > + if (IS_ERR(p->base)) { > > > + dev_err(&pdev->dev, "failed to remap I/O memory\n"); > > Duplicate noisy message. Removed extra log message > > + return PTR_ERR(p->base); > > + } > > > + ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p); > > + if (ret) { > > + dev_err(&pdev->dev, "unable to add gpio chip\n"); > > > + return ret; > > + } > > + > > + dev_info(&pdev->dev, "elba spics registered\n"); > > + return 0; > > if (ret) > dev_err(...); > return ret; Yes, made this change and will include in v3 patchset --- a/drivers/gpio/gpio-elba-spics.c +++ b/drivers/gpio/gpio-elba-spics.c @@ -91,13 +91,9 @@ static int elba_spics_probe(struct platform_device *pdev) ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p); - if (ret) { + if (ret) dev_err(&pdev->dev, "unable to add gpio chip\n"); - return ret; - } - - dev_info(&pdev->dev, "elba spics registered\n"); - return 0; + return ret; Regards, Brad _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel