I just wanted to let you know I have this queued up to review, I’ve just
been very overloaded. I’ll give these a review in the coming week.

Best,
Bobby

On Fri, Mar 3, 2023 at 2:24 AM Oleksii Kurochko <oleksii.kurochko@gmail.com>
wrote:

> The patch series groups and updates the following patches:
> 1. xen/riscv: disable fpu
> 2. xen/riscv: initialize .bss section
> 3. xen/riscv: read/save hart_id and dtb_base passed by bootloader
>
> ---
> Changes since v2:
>  * Patch [xen/riscv: disable fpu] was moved to the start of start()
>    function  to detect illegal usage of floating point
>    earlier.
>  * Add dummy_bss variable to make .bss initialization code more simple.
>  * Change comparison of addresses from signed to unsigned.
>  * Add the comment for start() function with the explanation what and
>    how OpenSBI pass to start() function.
>  * Clean up start() code related to read&save hart_id & dtb_base.
> ---
> Changes since v1:
>  * initialization of .bss was moved to head.S
>  * read/save/pass of hart_id and  dtb_base passed by a bootloader
>    were moved to head.S. Also, it was updated start_xen() arguments
>    to recieve hard_id & dtb_base
> ---
>
> Oleksii Kurochko (3):
>   xen/riscv: disable fpu
>   xen/riscv: read/save hart_id and dtb_base passed by bootloader
>   xen/riscv: initialize .bss section
>
>  xen/arch/riscv/riscv64/head.S | 21 +++++++++++++++++++++
>  xen/arch/riscv/setup.c        | 11 ++++++++++-
>  2 files changed, 31 insertions(+), 1 deletion(-)
>
> --
> 2.39.0
>
>