From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756153AbaGVQwq (ORCPT ); Tue, 22 Jul 2014 12:52:46 -0400 Received: from mail-ie0-f181.google.com ([209.85.223.181]:39385 "EHLO mail-ie0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753263AbaGVQwp convert rfc822-to-8bit (ORCPT ); Tue, 22 Jul 2014 12:52:45 -0400 MIME-Version: 1.0 X-Originating-IP: [84.73.67.144] In-Reply-To: <53CE93D4.3010204@amd.com> References: <20140709093124.11354.3774.stgit@patser> <20140709122953.11354.46381.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CE93D4.3010204@amd.com> Date: Tue, 22 Jul 2014 18:52:44 +0200 Message-ID: Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences From: Daniel Vetter To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: =?UTF-8?Q?Christian_K=C3=B6nig?= , Thomas Hellstrom , nouveau , LKML , dri-devel , "Deucher, Alexander" , Ben Skeggs Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 22, 2014 at 6:39 PM, Christian König wrote: >> Maybe I've mixed things up a bit in my description. There is >> fence_signal which the implementor/exporter of a fence must call when >> the fence is completed. If the exporter has an ->enable_signaling >> callback it can delay that call to fence_signal for as long as it >> wishes as long as enable_signaling isn't called yet. But that's just >> the optimization to not required irqs to be turned on all the time. >> >> The other function is fence_is_signaled, which is used by code that is >> interested in the fence state, together with fence_wait if it wants to >> block and not just wants to know the momentary fence state. All the >> other functions (the stuff that adds callbacks and the various _locked >> and other versions) are just for fancy special cases. > > Well that's rather bad, cause IRQs aren't reliable enough on Radeon HW for > such a thing. Especially on Prime systems and Macs. > > That's why we have this fancy HZ/2 timeout on all fence wait operations to > manually check if the fence is signaled or not. > > To guarantee that a fence is signaled after enable_signaling is called we > would need to fire up a kernel thread which periodically calls > fence->signaled. We actually have seen similar fun on some i915 platforms. I wonder whether we shouldn't have something in the fence core for this given how common it is. Currently we have the same trick with regular wakups on platforms with unreliable interrupts, but I haven't yet looked at how we'll do this with callbacks once we add the scheduler and fences. It might be though that we've finally fixed these coherency issues between the interrupt and the fence write for real. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences Date: Tue, 22 Jul 2014 18:52:44 +0200 Message-ID: References: <20140709093124.11354.3774.stgit@patser> <20140709122953.11354.46381.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CE93D4.3010204@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <53CE93D4.3010204@amd.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: Thomas Hellstrom , nouveau , LKML , dri-devel , Ben Skeggs , "Deucher, Alexander" List-Id: nouveau.vger.kernel.org T24gVHVlLCBKdWwgMjIsIDIwMTQgYXQgNjozOSBQTSwgQ2hyaXN0aWFuIEvDtm5pZwo8Y2hyaXN0 aWFuLmtvZW5pZ0BhbWQuY29tPiB3cm90ZToKPj4gTWF5YmUgSSd2ZSBtaXhlZCB0aGluZ3MgdXAg YSBiaXQgaW4gbXkgZGVzY3JpcHRpb24uIFRoZXJlIGlzCj4+IGZlbmNlX3NpZ25hbCB3aGljaCB0 aGUgaW1wbGVtZW50b3IvZXhwb3J0ZXIgb2YgYSBmZW5jZSBtdXN0IGNhbGwgd2hlbgo+PiB0aGUg ZmVuY2UgaXMgY29tcGxldGVkLiBJZiB0aGUgZXhwb3J0ZXIgaGFzIGFuIC0+ZW5hYmxlX3NpZ25h bGluZwo+PiBjYWxsYmFjayBpdCBjYW4gZGVsYXkgdGhhdCBjYWxsIHRvIGZlbmNlX3NpZ25hbCBm b3IgYXMgbG9uZyBhcyBpdAo+PiB3aXNoZXMgYXMgbG9uZyBhcyBlbmFibGVfc2lnbmFsaW5nIGlz bid0IGNhbGxlZCB5ZXQuIEJ1dCB0aGF0J3MganVzdAo+PiB0aGUgb3B0aW1pemF0aW9uIHRvIG5v dCByZXF1aXJlZCBpcnFzIHRvIGJlIHR1cm5lZCBvbiBhbGwgdGhlIHRpbWUuCj4+Cj4+IFRoZSBv dGhlciBmdW5jdGlvbiBpcyBmZW5jZV9pc19zaWduYWxlZCwgd2hpY2ggaXMgdXNlZCBieSBjb2Rl IHRoYXQgaXMKPj4gaW50ZXJlc3RlZCBpbiB0aGUgZmVuY2Ugc3RhdGUsIHRvZ2V0aGVyIHdpdGgg ZmVuY2Vfd2FpdCBpZiBpdCB3YW50cyB0bwo+PiBibG9jayBhbmQgbm90IGp1c3Qgd2FudHMgdG8g a25vdyB0aGUgbW9tZW50YXJ5IGZlbmNlIHN0YXRlLiBBbGwgdGhlCj4+IG90aGVyIGZ1bmN0aW9u cyAodGhlIHN0dWZmIHRoYXQgYWRkcyBjYWxsYmFja3MgYW5kIHRoZSB2YXJpb3VzIF9sb2NrZWQK Pj4gYW5kIG90aGVyIHZlcnNpb25zKSBhcmUganVzdCBmb3IgZmFuY3kgc3BlY2lhbCBjYXNlcy4K Pgo+IFdlbGwgdGhhdCdzIHJhdGhlciBiYWQsIGNhdXNlIElSUXMgYXJlbid0IHJlbGlhYmxlIGVu b3VnaCBvbiBSYWRlb24gSFcgZm9yCj4gc3VjaCBhIHRoaW5nLiBFc3BlY2lhbGx5IG9uIFByaW1l IHN5c3RlbXMgYW5kIE1hY3MuCj4KPiBUaGF0J3Mgd2h5IHdlIGhhdmUgdGhpcyBmYW5jeSBIWi8y IHRpbWVvdXQgb24gYWxsIGZlbmNlIHdhaXQgb3BlcmF0aW9ucyB0bwo+IG1hbnVhbGx5IGNoZWNr IGlmIHRoZSBmZW5jZSBpcyBzaWduYWxlZCBvciBub3QuCj4KPiBUbyBndWFyYW50ZWUgdGhhdCBh IGZlbmNlIGlzIHNpZ25hbGVkIGFmdGVyIGVuYWJsZV9zaWduYWxpbmcgaXMgY2FsbGVkIHdlCj4g d291bGQgbmVlZCB0byBmaXJlIHVwIGEga2VybmVsIHRocmVhZCB3aGljaCBwZXJpb2RpY2FsbHkg Y2FsbHMKPiBmZW5jZS0+c2lnbmFsZWQuCgpXZSBhY3R1YWxseSBoYXZlIHNlZW4gc2ltaWxhciBm dW4gb24gc29tZSBpOTE1IHBsYXRmb3Jtcy4gSSB3b25kZXIKd2hldGhlciB3ZSBzaG91bGRuJ3Qg aGF2ZSBzb21ldGhpbmcgaW4gdGhlIGZlbmNlIGNvcmUgZm9yIHRoaXMgZ2l2ZW4KaG93IGNvbW1v biBpdCBpcy4gQ3VycmVudGx5IHdlIGhhdmUgdGhlIHNhbWUgdHJpY2sgd2l0aCByZWd1bGFyIHdh a3VwcwpvbiBwbGF0Zm9ybXMgd2l0aCB1bnJlbGlhYmxlIGludGVycnVwdHMsIGJ1dCBJIGhhdmVu J3QgeWV0IGxvb2tlZCBhdApob3cgd2UnbGwgZG8gdGhpcyB3aXRoIGNhbGxiYWNrcyBvbmNlIHdl IGFkZCB0aGUgc2NoZWR1bGVyIGFuZCBmZW5jZXMuCkl0IG1pZ2h0IGJlIHRob3VnaCB0aGF0IHdl J3ZlIGZpbmFsbHkgZml4ZWQgdGhlc2UgY29oZXJlbmN5IGlzc3VlcwpiZXR3ZWVuIHRoZSBpbnRl cnJ1cHQgYW5kIHRoZSBmZW5jZSB3cml0ZSBmb3IgcmVhbC4KLURhbmllbAotLSAKRGFuaWVsIFZl dHRlcgpTb2Z0d2FyZSBFbmdpbmVlciwgSW50ZWwgQ29ycG9yYXRpb24KKzQxICgwKSA3OSAzNjUg NTcgNDggLSBodHRwOi8vYmxvZy5mZndsbC5jaApfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0 cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2RyaS1kZXZlbAo=