From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755866AbaGWHCN (ORCPT ); Wed, 23 Jul 2014 03:02:13 -0400 Received: from mail-ie0-f172.google.com ([209.85.223.172]:58312 "EHLO mail-ie0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753477AbaGWHCM convert rfc822-to-8bit (ORCPT ); Wed, 23 Jul 2014 03:02:12 -0400 MIME-Version: 1.0 X-Originating-IP: [84.73.67.144] In-Reply-To: <53CF5B9F.1050800@amd.com> References: <20140709093124.11354.3774.stgit@patser> <20140709122953.11354.46381.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CF58FB.8070609@canonical.com> <53CF5B9F.1050800@amd.com> Date: Wed, 23 Jul 2014 09:02:11 +0200 Message-ID: Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences From: Daniel Vetter To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: Maarten Lankhorst , =?UTF-8?Q?Christian_K=C3=B6nig?= , Thomas Hellstrom , nouveau , LKML , dri-devel , Ben Skeggs , "Deucher, Alexander" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 23, 2014 at 8:52 AM, Christian König wrote: >> In the preliminary patches where I can sync radeon with other GPU's I've >> been very careful in all the places that call into fences, to make sure that >> radeon wouldn't try to handle lockups for a different (possibly also radeon) >> card. > > That's actually not such a good idea. > > In case of a lockup we need to handle the lockup cause otherwise it could > happen that radeon waits for the lockup to be resolved and the lockup > handling needs to wait for a fence that's never signaled because of the > lockup. I thought the plan for now is that each driver handles lookups themselfs for now. So if any batch gets stuck for too long (whether it's our own gpu that's stuck or whether we're somehow stuck on a fence from a 2nd gpu doesn't matter) the driver steps in with a reset and signals completion to all its own fences that have been in that pile-up. As long as each driver participating in fencing has means to abort/reset we'll eventually get unstuck. Essentially every driver has to guarantee that assuming dependent fences all complete eventually that it _will_ complete its own fences no matter what. For now this should be good enough, but for arb_robusteness or people who care a bit about their compute results we need reliable notification to userspace that a reset happened. I think we could add a new "aborted" fence state for that case and then propagate that. But given how tricky the code to compute reset victims in i915 is already I think we should leave this out for now. And even later on make it strictly opt-in. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 09/17] drm/radeon: use common fence implementation for fences Date: Wed, 23 Jul 2014 09:02:11 +0200 Message-ID: References: <20140709093124.11354.3774.stgit@patser> <20140709122953.11354.46381.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CF58FB.8070609@canonical.com> <53CF5B9F.1050800@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <53CF5B9F.1050800-5C7GfCeVMHo@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Nouveau" To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: Thomas Hellstrom , nouveau , LKML , dri-devel , "Deucher, Alexander" , =?UTF-8?Q?Christian_K=C3=B6nig?= , Ben Skeggs List-Id: nouveau.vger.kernel.org T24gV2VkLCBKdWwgMjMsIDIwMTQgYXQgODo1MiBBTSwgQ2hyaXN0aWFuIEvDtm5pZwo8Y2hyaXN0 aWFuLmtvZW5pZ0BhbWQuY29tPiB3cm90ZToKPj4gSW4gdGhlIHByZWxpbWluYXJ5IHBhdGNoZXMg d2hlcmUgSSBjYW4gc3luYyByYWRlb24gd2l0aCBvdGhlciBHUFUncyBJJ3ZlCj4+IGJlZW4gdmVy eSBjYXJlZnVsIGluIGFsbCB0aGUgcGxhY2VzIHRoYXQgY2FsbCBpbnRvIGZlbmNlcywgdG8gbWFr ZSBzdXJlIHRoYXQKPj4gcmFkZW9uIHdvdWxkbid0IHRyeSB0byBoYW5kbGUgbG9ja3VwcyBmb3Ig YSBkaWZmZXJlbnQgKHBvc3NpYmx5IGFsc28gcmFkZW9uKQo+PiBjYXJkLgo+Cj4gVGhhdCdzIGFj dHVhbGx5IG5vdCBzdWNoIGEgZ29vZCBpZGVhLgo+Cj4gSW4gY2FzZSBvZiBhIGxvY2t1cCB3ZSBu ZWVkIHRvIGhhbmRsZSB0aGUgbG9ja3VwIGNhdXNlIG90aGVyd2lzZSBpdCBjb3VsZAo+IGhhcHBl biB0aGF0IHJhZGVvbiB3YWl0cyBmb3IgdGhlIGxvY2t1cCB0byBiZSByZXNvbHZlZCBhbmQgdGhl IGxvY2t1cAo+IGhhbmRsaW5nIG5lZWRzIHRvIHdhaXQgZm9yIGEgZmVuY2UgdGhhdCdzIG5ldmVy IHNpZ25hbGVkIGJlY2F1c2Ugb2YgdGhlCj4gbG9ja3VwLgoKSSB0aG91Z2h0IHRoZSBwbGFuIGZv ciBub3cgaXMgdGhhdCBlYWNoIGRyaXZlciBoYW5kbGVzIGxvb2t1cHMKdGhlbXNlbGZzIGZvciBu b3cuIFNvIGlmIGFueSBiYXRjaCBnZXRzIHN0dWNrIGZvciB0b28gbG9uZyAod2hldGhlcgppdCdz IG91ciBvd24gZ3B1IHRoYXQncyBzdHVjayBvciB3aGV0aGVyIHdlJ3JlIHNvbWVob3cgc3R1Y2sg b24gYQpmZW5jZSBmcm9tIGEgMm5kIGdwdSBkb2Vzbid0IG1hdHRlcikgdGhlIGRyaXZlciBzdGVw cyBpbiB3aXRoIGEgcmVzZXQKYW5kIHNpZ25hbHMgY29tcGxldGlvbiB0byBhbGwgaXRzIG93biBm ZW5jZXMgdGhhdCBoYXZlIGJlZW4gaW4gdGhhdApwaWxlLXVwLiBBcyBsb25nIGFzIGVhY2ggZHJp dmVyIHBhcnRpY2lwYXRpbmcgaW4gZmVuY2luZyBoYXMgbWVhbnMgdG8KYWJvcnQvcmVzZXQgd2Un bGwgZXZlbnR1YWxseSBnZXQgdW5zdHVjay4KCkVzc2VudGlhbGx5IGV2ZXJ5IGRyaXZlciBoYXMg dG8gZ3VhcmFudGVlIHRoYXQgYXNzdW1pbmcgZGVwZW5kZW50CmZlbmNlcyBhbGwgY29tcGxldGUg ZXZlbnR1YWxseSB0aGF0IGl0IF93aWxsXyBjb21wbGV0ZSBpdHMgb3duIGZlbmNlcwpubyBtYXR0 ZXIgd2hhdC4KCkZvciBub3cgdGhpcyBzaG91bGQgYmUgZ29vZCBlbm91Z2gsIGJ1dCBmb3IgYXJi X3JvYnVzdGVuZXNzIG9yIHBlb3BsZQp3aG8gY2FyZSBhIGJpdCBhYm91dCB0aGVpciBjb21wdXRl IHJlc3VsdHMgd2UgbmVlZCByZWxpYWJsZQpub3RpZmljYXRpb24gdG8gdXNlcnNwYWNlIHRoYXQg YSByZXNldCBoYXBwZW5lZC4gSSB0aGluayB3ZSBjb3VsZCBhZGQKYSBuZXcgImFib3J0ZWQiIGZl bmNlIHN0YXRlIGZvciB0aGF0IGNhc2UgYW5kIHRoZW4gcHJvcGFnYXRlIHRoYXQuIEJ1dApnaXZl biBob3cgdHJpY2t5IHRoZSBjb2RlIHRvIGNvbXB1dGUgcmVzZXQgdmljdGltcyBpbiBpOTE1IGlz IGFscmVhZHkKSSB0aGluayB3ZSBzaG91bGQgbGVhdmUgdGhpcyBvdXQgZm9yIG5vdy4gQW5kIGV2 ZW4gbGF0ZXIgb24gbWFrZSBpdApzdHJpY3RseSBvcHQtaW4uCi1EYW5pZWwKLS0gCkRhbmllbCBW ZXR0ZXIKU29mdHdhcmUgRW5naW5lZXIsIEludGVsIENvcnBvcmF0aW9uCis0MSAoMCkgNzkgMzY1 IDU3IDQ4IC0gaHR0cDovL2Jsb2cuZmZ3bGwuY2gKX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX18KTm91dmVhdSBtYWlsaW5nIGxpc3QKTm91dmVhdUBsaXN0cy5m cmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3Rp bmZvL25vdXZlYXUK