From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757145AbaGWIB7 (ORCPT ); Wed, 23 Jul 2014 04:01:59 -0400 Received: from mail-ig0-f171.google.com ([209.85.213.171]:45043 "EHLO mail-ig0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756744AbaGWIB5 convert rfc822-to-8bit (ORCPT ); Wed, 23 Jul 2014 04:01:57 -0400 MIME-Version: 1.0 X-Originating-IP: [84.73.67.144] In-Reply-To: <53CF6622.6060803@amd.com> References: <20140709093124.11354.3774.stgit@patser> <20140709122953.11354.46381.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CF58FB.8070609@canonical.com> <53CF5B9F.1050800@amd.com> <53CF5EFE.6070307@canonical.com> <53CF63C2.7070407@vodafone.de> <53CF6622.6060803@amd.com> Date: Wed, 23 Jul 2014 10:01:56 +0200 Message-ID: Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences From: Daniel Vetter To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: =?UTF-8?Q?Christian_K=C3=B6nig?= , Maarten Lankhorst , Thomas Hellstrom , nouveau , LKML , dri-devel , Ben Skeggs , "Deucher, Alexander" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 23, 2014 at 9:37 AM, Christian König wrote: > Am 23.07.2014 09:31, schrieb Daniel Vetter: >> On Wed, Jul 23, 2014 at 9:26 AM, Christian König >> wrote: >>> >>> It's not a locking problem I'm talking about here. Radeons lockup >>> handling >>> kicks in when anything calls into the driver from the outside, if you >>> have a >>> fence wait function that's called from the outside but doesn't handle >>> lockups you essentially rely on somebody else calling another radeon >>> function for the lockup to be resolved. >> >> So you don't have a timer in radeon that periodically checks whether >> progress is still being made? That's the approach we're using in i915, >> together with some tricks to kick any stuck waiters so that we can >> reliably step in and grab locks for the reset. > > > We tried this approach, but it didn't worked at all. > > I already considered trying it again because of the upcoming fence > implementation, but reconsidering that when a driver is forced to change > it's handling because of the fence implementation that's just another hint > that there is something wrong here. Out of curiosity: What's the blocker for using a timer/scheduled work to reset radeon? Getting this right on i915 has been fairly tricky and we now have an elaborate multi-stage state machine to get the driver through a reset. So always interested in different solutions. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences Date: Wed, 23 Jul 2014 10:01:56 +0200 Message-ID: References: <20140709093124.11354.3774.stgit@patser> <20140709122953.11354.46381.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CF58FB.8070609@canonical.com> <53CF5B9F.1050800@amd.com> <53CF5EFE.6070307@canonical.com> <53CF63C2.7070407@vodafone.de> <53CF6622.6060803@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <53CF6622.6060803@amd.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: Thomas Hellstrom , nouveau , LKML , dri-devel , "Deucher, Alexander" , Ben Skeggs List-Id: nouveau.vger.kernel.org T24gV2VkLCBKdWwgMjMsIDIwMTQgYXQgOTozNyBBTSwgQ2hyaXN0aWFuIEvDtm5pZwo8Y2hyaXN0 aWFuLmtvZW5pZ0BhbWQuY29tPiB3cm90ZToKPiBBbSAyMy4wNy4yMDE0IDA5OjMxLCBzY2hyaWVi IERhbmllbCBWZXR0ZXI6Cj4+IE9uIFdlZCwgSnVsIDIzLCAyMDE0IGF0IDk6MjYgQU0sIENocmlz dGlhbiBLw7ZuaWcKPj4gPGRlYXRoc2ltcGxlQHZvZGFmb25lLmRlPiB3cm90ZToKPj4+Cj4+PiBJ dCdzIG5vdCBhIGxvY2tpbmcgcHJvYmxlbSBJJ20gdGFsa2luZyBhYm91dCBoZXJlLiBSYWRlb25z IGxvY2t1cAo+Pj4gaGFuZGxpbmcKPj4+IGtpY2tzIGluIHdoZW4gYW55dGhpbmcgY2FsbHMgaW50 byB0aGUgZHJpdmVyIGZyb20gdGhlIG91dHNpZGUsIGlmIHlvdQo+Pj4gaGF2ZSBhCj4+PiBmZW5j ZSB3YWl0IGZ1bmN0aW9uIHRoYXQncyBjYWxsZWQgZnJvbSB0aGUgb3V0c2lkZSBidXQgZG9lc24n dCBoYW5kbGUKPj4+IGxvY2t1cHMgeW91IGVzc2VudGlhbGx5IHJlbHkgb24gc29tZWJvZHkgZWxz ZSBjYWxsaW5nIGFub3RoZXIgcmFkZW9uCj4+PiBmdW5jdGlvbiBmb3IgdGhlIGxvY2t1cCB0byBi ZSByZXNvbHZlZC4KPj4KPj4gU28geW91IGRvbid0IGhhdmUgYSB0aW1lciBpbiByYWRlb24gdGhh dCBwZXJpb2RpY2FsbHkgY2hlY2tzIHdoZXRoZXIKPj4gcHJvZ3Jlc3MgaXMgc3RpbGwgYmVpbmcg bWFkZT8gVGhhdCdzIHRoZSBhcHByb2FjaCB3ZSdyZSB1c2luZyBpbiBpOTE1LAo+PiB0b2dldGhl ciB3aXRoIHNvbWUgdHJpY2tzIHRvIGtpY2sgYW55IHN0dWNrIHdhaXRlcnMgc28gdGhhdCB3ZSBj YW4KPj4gcmVsaWFibHkgc3RlcCBpbiBhbmQgZ3JhYiBsb2NrcyBmb3IgdGhlIHJlc2V0Lgo+Cj4K PiBXZSB0cmllZCB0aGlzIGFwcHJvYWNoLCBidXQgaXQgZGlkbid0IHdvcmtlZCBhdCBhbGwuCj4K PiBJIGFscmVhZHkgY29uc2lkZXJlZCB0cnlpbmcgaXQgYWdhaW4gYmVjYXVzZSBvZiB0aGUgdXBj b21pbmcgZmVuY2UKPiBpbXBsZW1lbnRhdGlvbiwgYnV0IHJlY29uc2lkZXJpbmcgdGhhdCB3aGVu IGEgZHJpdmVyIGlzIGZvcmNlZCB0byBjaGFuZ2UKPiBpdCdzIGhhbmRsaW5nIGJlY2F1c2Ugb2Yg dGhlIGZlbmNlIGltcGxlbWVudGF0aW9uIHRoYXQncyBqdXN0IGFub3RoZXIgaGludAo+IHRoYXQg dGhlcmUgaXMgc29tZXRoaW5nIHdyb25nIGhlcmUuCgpPdXQgb2YgY3VyaW9zaXR5OiBXaGF0J3Mg dGhlIGJsb2NrZXIgZm9yIHVzaW5nIGEgdGltZXIvc2NoZWR1bGVkIHdvcmsKdG8gcmVzZXQgcmFk ZW9uPyBHZXR0aW5nIHRoaXMgcmlnaHQgb24gaTkxNSBoYXMgYmVlbiBmYWlybHkgdHJpY2t5IGFu ZAp3ZSBub3cgaGF2ZSBhbiBlbGFib3JhdGUgbXVsdGktc3RhZ2Ugc3RhdGUgbWFjaGluZSB0byBn ZXQgdGhlIGRyaXZlcgp0aHJvdWdoIGEgcmVzZXQuIFNvIGFsd2F5cyBpbnRlcmVzdGVkIGluIGRp ZmZlcmVudCBzb2x1dGlvbnMuCi1EYW5pZWwKLS0gCkRhbmllbCBWZXR0ZXIKU29mdHdhcmUgRW5n aW5lZXIsIEludGVsIENvcnBvcmF0aW9uCis0MSAoMCkgNzkgMzY1IDU3IDQ4IC0gaHR0cDovL2Js b2cuZmZ3bGwuY2gKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3Jn Cmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK