From: Kever Yang <kever.yang@rock-chips.com>
To: Johan Jonker <jbx6244@gmail.com>
Cc: "Kever Yang" <kever.yang@rock-chips.com>,
"Simon Glass" <sjg@chromium.org>,
philipp.tomsich@vrull.eu, "Heiko Stuebner" <heiko@sntech.de>,
"Paweł Jarosz" <paweljarosz3691@gmail.com>,
U-Boot-Denx <u-boot@lists.denx.de>
Subject: Re: [PATCH v2 5/5] ARM: dts: rockchip: update rk3188-radxarock.dts
Date: Wed, 11 Aug 2021 17:50:50 +0800 [thread overview]
Message-ID: <CAKUh=RwpM1UYrQtdwkaav5TS1fzBuLe1RjNXNOWJsSFmJZkXKA@mail.gmail.com> (raw)
In-Reply-To: <20210625132633.14137-5-jbx6244@gmail.com>
Johan Jonker <jbx6244@gmail.com> 于2021年6月25日周五 下午9:31写道：
>
> In the Linux DT the file rk3xxx.dtsi is shared between
> rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
> had some updates.
> For a future rk3066 support in U-boot this file must also update.
> Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/rk3188-radxarock-u-boot.dtsi | 38 ++++++++++---
> arch/arm/dts/rk3188-radxarock.dts | 88 +++++++++++++++----------------
> 2 files changed, 73 insertions(+), 53 deletions(-)
>
> diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
> index 204bb3a90e..9c9016de1b 100644
> --- a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
> +++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
> @@ -5,36 +5,58 @@
>
> #include "rk3188-u-boot.dtsi"
>
> +/ {
> + chosen {
> +/* stdout-path = &uart2; */
> + stdout-path = "serial2:115200n8";
> + };
> +
> + config {
> + u-boot,boot-led = "rock:red:power";
> + u-boot,dm-pre-reloc;
> + };
> +};
> +
> &cru {
> u-boot,dm-spl;
> };
>
> -&pinctrl {
> - u-boot,dm-spl;
> +&dmc {
> + rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
> + 0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
> + 0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
> + 0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
> + 0x4 0x0>;
> + rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
> + 0x220 0x40 0x0 0x0>;
> + rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
> };
>
> -&mmc0 {
> +&emmc {
> fifo-mode;
> max-frequency = <16000000>;
> };
>
> -&mmc1 {
> +&mmc0 {
> fifo-mode;
> max-frequency = <16000000>;
> };
>
> -&emmc {
> +&mmc1 {
> fifo-mode;
> max-frequency = <16000000>;
> };
>
> -&uart2 {
> - status = "okay";
> +&pinctrl {
> u-boot,dm-spl;
> };
>
> &timer3 {
> compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
> - u-boot,dm-spl;
> clock-frequency = <24000000>;
> + u-boot,dm-spl;
> +};
> +
> +&uart2 {
> + u-boot,dm-spl;
> };
> diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
> index 10527a052d..e7138a4ae0 100644
> --- a/arch/arm/dts/rk3188-radxarock.dts
> +++ b/arch/arm/dts/rk3188-radxarock.dts
> @@ -1,4 +1,4 @@
> -// SPDX-License-Identifier: GPL-2.0+ OR X11
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> /*
> * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
> */
> @@ -16,17 +16,7 @@
> mmc0 = &mmc0;
> };
>
> - chosen {
> -/* stdout-path = &uart2; */
> - stdout-path = "serial2:115200n8";
> - };
> -
> - config {
> - u-boot,dm-pre-reloc;
> - u-boot,boot-led = "rock:red:power";
> - };
> -
> - memory {
> + memory@60000000 {
> device_type = "memory";
> reg = <0x60000000 0x80000000>;
> };
> @@ -36,7 +26,7 @@
> autorepeat;
>
> power {
> - gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
> + gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
> linux,code = <KEY_POWER>;
> label = "GPIO Key Power";
> linux,input-type = <1>;
> @@ -48,21 +38,21 @@
> gpio-leds {
> compatible = "gpio-leds";
>
> - green {
> + green_led: led-0 {
> label = "rock:green:user1";
> - gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
> + gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>;
> default-state = "off";
> };
>
> - blue {
> + blue_led: led-1 {
> label = "rock:blue:user2";
> - gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
> + gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
> default-state = "off";
> };
>
> - sleep {
> + sleep_led: led-2 {
> label = "rock:red:power";
> - gpios = <&gpio0 15 0>;
> + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
> default-state = "off";
> };
> };
> @@ -84,7 +74,7 @@
>
> ir_recv: gpio-ir-receiver {
> compatible = "gpio-ir-receiver";
> - gpios = <&gpio0 10 1>;
> + gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
> pinctrl-names = "default";
> pinctrl-0 = <&ir_recv_pin>;
> };
> @@ -92,7 +82,7 @@
> vcc_otg: usb-otg-regulator {
> compatible = "regulator-fixed";
> enable-active-high;
> - gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
> + gpio = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&otg_vbus_drv>;
> regulator-name = "otg-vbus";
> @@ -107,7 +97,7 @@
> regulator-name = "sdmmc-supply";
> regulator-min-microvolt = <3300000>;
> regulator-max-microvolt = <3300000>;
> - gpio = <&gpio3 1 GPIO_ACTIVE_LOW>;
> + gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
> pinctrl-names = "default";
> pinctrl-0 = <&sdmmc_pwr>;
> startup-delay-us = <100000>;
> @@ -117,7 +107,7 @@
> vcc_host: usb-host-regulator {
> compatible = "regulator-fixed";
> enable-active-high;
> - gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
> + gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&host_vbus_drv>;
> regulator-name = "host-pwr";
> @@ -136,17 +126,6 @@
> };
> };
>
> -&dmc {
> - rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
> - 0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
> - 0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
> - 0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
> - 0x4 0x0>;
> - rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
> - 0x220 0x40 0x0 0x0>;
> - rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
> -};
> -
> &emac {
> status = "okay";
>
> @@ -159,12 +138,28 @@
> phy0: ethernet-phy@0 {
> reg = <0>;
> interrupt-parent = <&gpio3>;
> - interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
> + interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
> };
> };
>
> &cpu0 {
> - cpu0-supply = <&vdd_arm>;
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&gpu {
> + status = "okay";
> };
>
> &i2c1 {
> @@ -175,7 +170,7 @@
> compatible = "haoyu,hym8563";
> reg = <0x51>;
> interrupt-parent = <&gpio0>;
> - interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
> + interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
> pinctrl-names = "default";
> pinctrl-0 = <&rtc_int>;
> #clock-cells = <0>;
> @@ -287,7 +282,6 @@
> };
>
> &mmc0 {
> - num-slots = <1>;
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
> @@ -318,40 +312,40 @@
>
> act8846 {
> act8846_dvs0_ctl: act8846-dvs0-ctl {
> - rockchip,pins = <RK_GPIO3 27 RK_FUNC_GPIO &pcfg_output_low>;
> + rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>;
> };
> };
>
> hym8563 {
> rtc_int: rtc-int {
> - rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
> };
> };
>
> lan8720a {
> phy_int: phy-int {
> - rockchip,pins = <RK_GPIO3 26 RK_FUNC_GPIO &pcfg_pull_up>;
> + rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
> };
> };
>
> ir-receiver {
> ir_recv_pin: ir-recv-pin {
> - rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
> + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
>
> sd0 {
> sdmmc_pwr: sdmmc-pwr {
> - rockchip,pins = <RK_GPIO3 1 RK_FUNC_GPIO &pcfg_pull_none>;
> + rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
>
> usb {
> host_vbus_drv: host-vbus-drv {
> - rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
> + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> otg_vbus_drv: otg-vbus-drv {
> - rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
> + rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
> };
> @@ -368,6 +362,10 @@
> status = "okay";
> };
>
> +&uart2 {
> + status = "okay";
> +};
> +
> &uart3 {
> status = "okay";
> };
> --
> 2.11.0
>
next prev parent reply other threads:[~2021-08-11 9:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-25 13:26 [PATCH v2 1/5] rockchip: rk3188-cru-common: sync clock dt-binding header from Linux Johan Jonker
2021-06-25 13:26 ` [PATCH v2 2/5] ARM: dts: rockchip: update rk3xxx.dtsi Johan Jonker
2021-08-11 9:50 ` Kever Yang
2021-11-04 11:27 ` Alex Bee
2021-06-25 13:26 ` [PATCH v2 3/5] rockchip: rk3188-power: sync power domain dt-binding header from Linux Johan Jonker
2021-08-11 9:51 ` Kever Yang
2021-06-25 13:26 ` [PATCH v2 4/5] ARM: dts: rockchip: update rk3188.dtsi Johan Jonker
2021-08-11 9:50 ` Kever Yang
2021-06-25 13:26 ` [PATCH v2 5/5] ARM: dts: rockchip: update rk3188-radxarock.dts Johan Jonker
2021-08-11 9:50 ` Kever Yang [this message]
2021-08-11 9:48 ` [PATCH v2 1/5] rockchip: rk3188-cru-common: sync clock dt-binding header from Linux Kever Yang
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