From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kever Yang <kever.yang@rock-chips.com>
Date: Thu, 21 Jan 2021 21:08:15 +0800
Subject: [patch v3 3/9] ockchip: video: edp: Change interrupt polarity
 configuration
In-Reply-To: <20201120132823.748319735@rtp-net.org>
References: <20201120132421.500365403@rtp-net.org>
 <20201120132823.748319735@rtp-net.org>
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To: u-boot@lists.denx.de

Hi Arnaud,
    Please correct the typo in subject line.

Thanks,
- Kever

Arnaud Patard <arnaud.patard@rtp-net.org> ?2020?11?20??? ??9:30???

> The linux code is setting polarity configuration to 3 but
> uboot code is setting it to 1. Change the configuration to match the
> linux configuration
>
> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
> Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
> ===================================================================
> --- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
> +++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
> @@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0
>
>  /* int_ctl */
>  #define SOFT_INT_CTRL                          (0x1 << 2)
> -#define INT_POL                                        (0x1 << 0)
> +#define INT_POL1                               (0x1 << 1)
> +#define INT_POL0                               (0x1 << 0)
> +#define INT_POL                                        (INT_POL0 |
> INT_POL1)
>
>  /* sys_ctl_1 */
>  #define DET_STA                                        (0x1 << 2)
>
>
>