From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S941583AbcJYKCd (ORCPT ); Tue, 25 Oct 2016 06:02:33 -0400 Received: from mail-qk0-f177.google.com ([209.85.220.177]:33591 "EHLO mail-qk0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752758AbcJYKCb (ORCPT ); Tue, 25 Oct 2016 06:02:31 -0400 MIME-Version: 1.0 In-Reply-To: References: <20161024164634.4330-1-ahaslam@baylibre.com> <20161024164634.4330-8-ahaslam@baylibre.com> From: Axel Haslam Date: Tue, 25 Oct 2016 12:01:50 +0200 Message-ID: Subject: Re: [PATCH/RFT v2 07/17] ARM: davinci: da8xx: Enable the usb20 "per" clk on phy_clk_enable To: David Lechner Cc: Greg KH , Johan Hovold , robh+dt@kernel.org, Sekhar Nori , Alan Stern , Kevin Hilman , Sergei Shtylyov , manjunath.goudar@linaro.org, Mark Brown , Alexandre Bailon , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 25, 2016 at 4:53 AM, David Lechner wrote: > On 10/24/2016 11:46 AM, ahaslam@baylibre.com wrote: >> >> From: Axel Haslam >> >> While probing ochi phy with usb20 phy as a parent clock for usb11_phy, >> the usb20_phy clock enable would time out. This is because the usb20 >> module clock needs to enabled while trying to lock the usb20_phy PLL. >> >> Call clk enable and get for the usb20 peripheral before trying to >> enable the phy PLL. >> >> Signed-off-by: Axel Haslam >> --- > > > > This patch can be combined with "ARM: davinci: da8xx: add usb phy clocks" > since that patch has not been merged yet. yes, agree, these should be merged. > > If you like, I can resubmit my patches from this series along with the > changes from this patch. Ok, if you can resubmit those patches with this change included i can reference them and start making the series shorter. i will also submit in separate patches the regulator changes, as requested by Mark. Regards Axel. > From mboxrd@z Thu Jan 1 00:00:00 1970 From: ahaslam@baylibre.com (Axel Haslam) Date: Tue, 25 Oct 2016 12:01:50 +0200 Subject: [PATCH/RFT v2 07/17] ARM: davinci: da8xx: Enable the usb20 "per" clk on phy_clk_enable In-Reply-To: References: <20161024164634.4330-1-ahaslam@baylibre.com> <20161024164634.4330-8-ahaslam@baylibre.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Oct 25, 2016 at 4:53 AM, David Lechner wrote: > On 10/24/2016 11:46 AM, ahaslam at baylibre.com wrote: >> >> From: Axel Haslam >> >> While probing ochi phy with usb20 phy as a parent clock for usb11_phy, >> the usb20_phy clock enable would time out. This is because the usb20 >> module clock needs to enabled while trying to lock the usb20_phy PLL. >> >> Call clk enable and get for the usb20 peripheral before trying to >> enable the phy PLL. >> >> Signed-off-by: Axel Haslam >> --- > > > > This patch can be combined with "ARM: davinci: da8xx: add usb phy clocks" > since that patch has not been merged yet. yes, agree, these should be merged. > > If you like, I can resubmit my patches from this series along with the > changes from this patch. Ok, if you can resubmit those patches with this change included i can reference them and start making the series shorter. i will also submit in separate patches the regulator changes, as requested by Mark. Regards Axel. >