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From: Alistair Francis <alistair23@gmail.com>
Date: Thu, 3 Aug 2017 07:32:40 -0700
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Subject: Re: [Qemu-devel] [PATCH 39/47] MAINTAINERS: add missing SSI entries
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To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= <f4bug@amsat.org>
Cc: Peter Crosthwaite <crosthwaite.peter@gmail.com>, QEMU Trivial <qemu-trivial@nongnu.org>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>

On Fri, Jul 28, 2017 at 5:49 PM, Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.o=
rg> wrote:
> On 07/28/2017 08:56 PM, Alistair Francis wrote:
>>
>> On Thu, Jul 27, 2017 at 10:36 PM, Philippe Mathieu-Daud=C3=A9
>> <f4bug@amsat.org> wrote:
>>>
>>> Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
>>> ---
>>> RFC because I'm not sure m25p80 fits.
>>>
>>>   MAINTAINERS | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 54e35fdab9..83597fca4e 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -1010,7 +1010,9 @@ M: Peter Crosthwaite <crosthwaite.peter@gmail.com=
>
>>>   S: Maintained
>>>   F: hw/ssi/*
>>>   F: hw/block/m25p80.c
>>> +F: include/hw/ssi/ssi.h
>>>   X: hw/ssi/xilinx_*
>>> +F: tests/m25p80-test.c
>>
>>
>> I'm not sure if Peter is still maintaining this. Maybe it's worth
>> adding another Xilinx email in here as well.
>
>
> you mean yours? M: Alistair Francis <alistair.francis@xilinx.com> below
> Peter's?

I think that's a good idea. Peter hasn't responded to this, so it's
probably best to have someone else on the list.

Thanks,
Alistair

>
>
>>
>> Thanks,
>> Alistair
>>
>>>
>>>   Xilinx SPI
>>>   M: Alistair Francis <alistair.francis@xilinx.com>
>>> --
>>> 2.13.3
>>>
>>>
>