From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49456) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fEKhl-000318-Vv for qemu-devel@nongnu.org; Thu, 03 May 2018 16:19:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fEKhk-00038X-VT for qemu-devel@nongnu.org; Thu, 03 May 2018 16:19:53 -0400 Received: from mail-lf0-x241.google.com ([2a00:1450:4010:c07::241]:41376) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fEKhk-00037q-Ny for qemu-devel@nongnu.org; Thu, 03 May 2018 16:19:52 -0400 Received: by mail-lf0-x241.google.com with SMTP id o123-v6so27820053lfe.8 for ; Thu, 03 May 2018 13:19:52 -0700 (PDT) MIME-Version: 1.0 References: <20180503091922.28733-1-edgar.iglesias@gmail.com> <20180503091922.28733-11-edgar.iglesias@gmail.com> In-Reply-To: <20180503091922.28733-11-edgar.iglesias@gmail.com> From: Alistair Francis Date: Thu, 03 May 2018 20:19:25 +0000 Message-ID: Content-Type: text/plain; charset="UTF-8" Subject: Re: [Qemu-devel] [PATCH v1 10/29] target-microblaze: Bypass MMU with MMU_NOMMU_IDX List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Edgar Iglesias Cc: "qemu-devel@nongnu.org Developers" , Edgar Iglesias , Peter Maydell , Sai Pavan Boddu , Francisco Iglesias , Alistair Francis , Richard Henderson On Thu, May 3, 2018 at 2:22 AM Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > Bypass MMU translation when mmu-index MMU_NOMMU_IDX is used. > Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Alistair > --- > target/microblaze/helper.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c > index a9f4ca93e3..261dcc74c7 100644 > --- a/target/microblaze/helper.c > +++ b/target/microblaze/helper.c > @@ -58,7 +58,8 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, > int prot; > /* Translate if the MMU is available and enabled. */ > - if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)) { > + if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM) > + && mmu_idx != MMU_NOMMU_IDX) { > uint32_t vaddr, paddr; > struct microblaze_mmu_lookup lu; > -- > 2.14.1