From mboxrd@z Thu Jan 1 00:00:00 1970 From: Viresh Kumar Subject: Re: [PATCH 02/14] ARM: SPEAr13xx: DT: Add spics gpio controller nodes Date: Tue, 13 Nov 2012 20:04:37 +0530 Message-ID: References: <58a7d91cab20b924784fb5a09e16ca08e6f13318.1352608333.git.viresh.kumar@linaro.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1522225714898991474==" Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Linus Walleij Cc: arnd@arndb.de, devicetree-discuss@lists.ozlabs.org, spear-devel@list.st.com, arm@kernel.org, olof@lixom.net, sr@denx.de, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org --===============1522225714898991474== Content-Type: multipart/alternative; boundary=f46d04426cd04f208e04ce615173 --f46d04426cd04f208e04ce615173 Content-Type: text/plain; charset=ISO-8859-1 On Nov 13, 2012 7:38 PM, "Linus Walleij" wrote: > > On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar wrote: > > > From: Shiraz Hashim > > > > SPEAr platform provides a provision to control chipselects of ARM PL022 Prime > > Cell spi controller through its system registers, which otherwise remains under > > PL022 control which some protocols do not want. > > So I guess this platform us utilizing the cs_control field of the > PL022 platform data to do the actual magic, right? Correct. > > This patch adds spics controller nodes in device tree for various SPEAr13xx > > SoCs. > > > > Cc: Linus Walleij > > Signed-off-by: Shiraz Hashim > > Reviewed-by: Vipin Kumar > > Signed-off-by: Viresh Kumar > (...) > > ahb { > > + spics: spics@e0700000{ > > + compatible = "st,spear-spics-gpio"; > > + reg = <0xe0700000 0x1000>; > > + st-spics,peripcfg-reg = <0x3b0>; > > + st-spics,sw-enable-bit = <12>; > > + st-spics,cs-value-bit = <11>; > > + st-spics,cs-enable-mask = <3>; > > + st-spics,cs-enable-shift = <8>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + }; > > + > > Are these bindings documented? The main patch waiting for ur comments is 1/14. > Apart from that remark: > Acked-by: Linus Walleij > > Yours, > Linus Walleij --f46d04426cd04f208e04ce615173 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable


On Nov 13, 2012 7:38 PM, "Linus Walleij" <linus.walleij@linaro.org> wrote:
>
> On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote:
>
> > From: Shiraz Hashim <s= hiraz.hashim@st.com>
> >
> > SPEAr platform provides a provision to control chipselects of ARM= PL022 Prime
> > Cell spi controller through its system registers, which otherwise= remains under
> > PL022 control which some protocols do not want.
>
> So I guess this platform us utilizing the cs_control field of the
> PL022 platform data to do the actual magic, right?

Correct.

> > This patch adds spics controller nodes in device tree for vari= ous SPEAr13xx
> > SoCs.
> >
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
> > Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
> > Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
> (...)
> > =A0 =A0 =A0 =A0 ahb {
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 spics: spics@e0700000{
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D &quo= t;st,spear-spics-gpio";
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0xe0700= 000 0x1000>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 st-spics,peripcfg-r= eg =3D <0x3b0>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 st-spics,sw-enable-= bit =3D <12>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 st-spics,cs-value-b= it =3D <11>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 st-spics,cs-enable-= mask =3D <3>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 st-spics,cs-enable-= shift =3D <8>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 gpio-controller; > > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 #gpio-cells =3D <= ;2>;
> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 };
> > +
>
> Are these bindings documented?

The main patch waiting for ur comments is 1/14.

> Apart from that remark:
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Yours,
> Linus Walleij

--f46d04426cd04f208e04ce615173-- --===============1522225714898991474== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============1522225714898991474==-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: viresh.kumar@linaro.org (Viresh Kumar) Date: Tue, 13 Nov 2012 20:04:37 +0530 Subject: [PATCH 02/14] ARM: SPEAr13xx: DT: Add spics gpio controller nodes In-Reply-To: References: <58a7d91cab20b924784fb5a09e16ca08e6f13318.1352608333.git.viresh.kumar@linaro.org> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Nov 13, 2012 7:38 PM, "Linus Walleij" wrote: > > On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar wrote: > > > From: Shiraz Hashim > > > > SPEAr platform provides a provision to control chipselects of ARM PL022 Prime > > Cell spi controller through its system registers, which otherwise remains under > > PL022 control which some protocols do not want. > > So I guess this platform us utilizing the cs_control field of the > PL022 platform data to do the actual magic, right? Correct. > > This patch adds spics controller nodes in device tree for various SPEAr13xx > > SoCs. > > > > Cc: Linus Walleij > > Signed-off-by: Shiraz Hashim > > Reviewed-by: Vipin Kumar > > Signed-off-by: Viresh Kumar > (...) > > ahb { > > + spics: spics at e0700000{ > > + compatible = "st,spear-spics-gpio"; > > + reg = <0xe0700000 0x1000>; > > + st-spics,peripcfg-reg = <0x3b0>; > > + st-spics,sw-enable-bit = <12>; > > + st-spics,cs-value-bit = <11>; > > + st-spics,cs-enable-mask = <3>; > > + st-spics,cs-enable-shift = <8>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + }; > > + > > Are these bindings documented? The main patch waiting for ur comments is 1/14. > Apart from that remark: > Acked-by: Linus Walleij > > Yours, > Linus Walleij -------------- next part -------------- An HTML attachment was scrubbed... URL: