Re: [PATCH v1] mips/mips_malta: Allow more than 2G RAM

[Aleksandar Markovic <aleksandar.m.mail@gmail.com>]

On Thu, Mar 5, 2020 at 11:18 AM Philippe Mathieu-Daudé
<philmd@redhat.com> wrote:
>
> Please post new patches as v2, and do not post them as reply to v1.
>
> On 3/3/20 1:41 AM, Jiaxun Yang wrote:
> > When malta is coupled with MIPS64 cpu which have 64bit
> > address space, it is possible to have more than 2G RAM.
> >
> > So we removed ram_size check and overwrite memory
> > layout for these targets.
> >
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > Suggested-by: Yunqiang Su <ysu@wavecomp.com>
> > --
> > v1: Do not overwrite cmdline when we don't have highmem.
> > ---
> >   hw/mips/mips_malta.c | 29 +++++++++++++++++++++++------
> >   1 file changed, 23 insertions(+), 6 deletions(-)
> >
> > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> > index 6e7ba9235d..4267958f35 100644
> > --- a/hw/mips/mips_malta.c
> > +++ b/hw/mips/mips_malta.c
> > @@ -98,7 +98,8 @@ typedef struct {
> >   } MaltaState;
> >
> >   static struct _loaderparams {
> > -    int ram_size, ram_low_size;
> > +    unsigned int ram_low_size;
> > +    ram_addr_t ram_size;
> >       const char *kernel_filename;
> >       const char *kernel_cmdline;
> >       const char *initrd_filename;
> > @@ -1023,6 +1024,7 @@ static int64_t load_kernel(void)
> >   {
> >       int64_t kernel_entry, kernel_high, initrd_size;
> >       long kernel_size;
> > +    char mem_cmdline[128];
> >       ram_addr_t initrd_offset;
> >       int big_endian;
> >       uint32_t *prom_buf;
> > @@ -1099,20 +1101,33 @@ static int64_t load_kernel(void)
> >       prom_buf = g_malloc(prom_size);
> >
> >       prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename);
> > +
> > +    memset(&mem_cmdline[0], 0, sizeof(mem_cmdline));
> > +    if (loaderparams.ram_size > 0x10000000) {
>
> Please use 256 * MiB.
>
> > +        /*
> > +         * Always use cmdline to overwrite mem layout
> > +         * as kernel may reject large emesize.
> > +         */
> > +        sprintf(&mem_cmdline[0],
> > +                "mem=0x10000000@0x00000000 mem=0x%" PRIx64 "@0x90000000",
> > +                loaderparams.ram_size - 0x10000000);
>
> Ditto.
>
> Also please use g_strdup_printf("mem=0x%" PRIx64 "@...")/g_free.
>
> > +    }
> > +
> >       if (initrd_size > 0) {
> >           prom_set(prom_buf, prom_index++,
> > -                 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
> > -                 xlate_to_kseg0(NULL, initrd_offset),
> > +                 "%s rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
> > +                 &mem_cmdline[0], xlate_to_kseg0(NULL, initrd_offset),
> >                    initrd_size, loaderparams.kernel_cmdline);
> >       } else {
> > -        prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline);
> > +        prom_set(prom_buf, prom_index++, "%s %s", &mem_cmdline[0],
> > +                 loaderparams.kernel_cmdline);
> >       }
> >
> >       prom_set(prom_buf, prom_index++, "memsize");
> >       prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size);
> >
> >       prom_set(prom_buf, prom_index++, "ememsize");
> > -    prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size);
> > +    prom_set(prom_buf, prom_index++, "%lu", loaderparams.ram_size);
> >
> >       prom_set(prom_buf, prom_index++, "modetty0");
> >       prom_set(prom_buf, prom_index++, "38400n8r");
> > @@ -1253,12 +1268,14 @@ void mips_malta_init(MachineState *machine)
> >       /* create CPU */
> >       mips_create_cpu(machine, s, &cbus_irq, &i8259_irq);
> >
> > -    /* allocate RAM */
> > +#ifdef TARGET_MIPS32
> > +    /* MIPS32 won't accept more than 2GiB RAM due to limited address space */
>
> Cc'ing Paul Burton due to commit 94c2b6aff43.
>
> >       if (ram_size > 2 * GiB) {
> >           error_report("Too much memory for this machine: %" PRId64 "MB,"
> >                        " maximum 2048MB", ram_size / MiB);
>
> This is annoying, because the CoreLV/CoreFPGA core cards only have 4
> DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A
> north bridge accept at most 256 MiB per SCS for address decoding, so we
> have a maximum of 1 GiB on 32-bit boards.
>
> In 64-bit emulation we use the a 20Kc core, provided by the Core20K core
> card which doesn't use the GT–64120A but the Bonito64. So the model is
> incorrect... The Bonito64 indeed allow more memory.
>
> Maybe it is time to consider that for 64-bit targets, since we are not
> modelling a Malta core board, we can name it the official 'virt' machine...
>

Philippe, I almost agree 100% with you wrt last three paragraphs.
(in any case, I know much less than you about details of GT-64120A
and Bonito64, but I trust you).

The only area I have a slightly different opinion is that I believe we
should never declare Malta as a virtual board, and try to be within the
boundaries of physical capabilities of real boards, even if in software
(QEMU) we could "enhance" some features.

If we want MIPS virtual board, than we should devise a full blown
virtual board, similar to what was already done for MIPS Android
emulator. I really don't want some real/virtual frankenstein in QEMU
upstream just because it is convenient for let's say a particular
test setup.

Aleksandar

> >           exit(1);
> >       }
> > +#endif
> >
> >       /* register RAM at high address where it is undisturbed by IO */
> >       memory_region_add_subregion(system_memory, 0x80000000, machine->ram);
> >
>
>