From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 592C6C432C0 for ; Tue, 26 Nov 2019 01:10:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA5D02068F for ; Tue, 26 Nov 2019 01:10:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VI+xQ0QS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EA5D02068F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:49466 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iZPMk-0006QU-UB for qemu-devel@archiver.kernel.org; Mon, 25 Nov 2019 20:10:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57386) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iZPLi-0005ym-Qn for qemu-devel@nongnu.org; Mon, 25 Nov 2019 20:09:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iZPLf-0000Te-MQ for qemu-devel@nongnu.org; Mon, 25 Nov 2019 20:09:02 -0500 Received: from mail-ot1-x341.google.com ([2607:f8b0:4864:20::341]:37882) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iZPLf-0000Rz-B8 for qemu-devel@nongnu.org; Mon, 25 Nov 2019 20:08:59 -0500 Received: by mail-ot1-x341.google.com with SMTP id d5so14447321otp.4 for ; Mon, 25 Nov 2019 17:08:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=kcaN5jpgmRJJtsOTb08L9bKnDEJmS1vRT73jLFbNdGY=; b=VI+xQ0QSew4rQaOAugkjc4VyuPiG0dArlaIGt5h4PljbJrQdDb2i3hbugZtJ2ytTNf SeLSVBvErOVUSdNPpdlZwcVBW/3io55jeTKO6sxaW6B01hVCaRZ02kZA33JqN32lPTu4 n8tUbbo78+FyRc9vZRSeB+DnpRqveCagnQCMtWcMqBauzaaBhLm9qc5oSFmh+QT1mS3T sHVWzaNTSxTBGyfvntbvPuvhXpPeGr3HGWqrRgz5Rn/Gx8QNwgIQTVwiwlE3doA3HIN+ RLpdPjxR7+Gsn/I04kPntZewsFmqNlbyLPhrYT2pNuSap4UqqAcFLdKOTsO4IyDRT8w9 i1HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=kcaN5jpgmRJJtsOTb08L9bKnDEJmS1vRT73jLFbNdGY=; b=M8TVakOM20VcSkXU45yvsQsepF/cdxrKWwWXuWKJkzPXlXYSSbheWqSlvmjOQOiLBM PKdGuz8KcPKK5iBlX+VFQ3j/b+0pddPOPFzZ1GGy3uc7SFTcKgjhbxhXNN3DPq/eUsVg OGCuWyL5P5BG98JUTu2gHj7qqZAdU9hxzotBOXKKfGMA4hmbOzRXu707fHoR0Iyvd0R8 mDQjmOCwEuwxW2FEZmoRczpU+8hZtcMAi/cXxXf22oYU+jCBdNPvrAU3JhCsMS/6cbGH sHMupVm7g0msu5sbYzlP+RKvlvzzzuaPSP3ltJuIsU5O8zYCKQkiOBxAHbPQILhWxomn /yZg== X-Gm-Message-State: APjAAAWpYFKcVm3s5F/aDQDZsvDG/aQQcira2aFL0czPjMS4SEM+0LS0 MZG1S6Bi49pYPhU/J2JSRsW96MokKQ7QvAU+S0U= X-Google-Smtp-Source: APXvYqzMclX8PckBink+HywTuIe1sUUxuWJyr1hNDABzIwRQaV+f49wkT5SY42N6nsnfybMJ3nTHU9LbiKWHpFnEqBc= X-Received: by 2002:a9d:3d05:: with SMTP id a5mr475497otc.295.1574730537717; Mon, 25 Nov 2019 17:08:57 -0800 (PST) MIME-Version: 1.0 Received: by 2002:a05:6830:1391:0:0:0:0 with HTTP; Mon, 25 Nov 2019 17:08:57 -0800 (PST) In-Reply-To: <20191124050225.30351-13-mrolnik@gmail.com> References: <20191124050225.30351-1-mrolnik@gmail.com> <20191124050225.30351-13-mrolnik@gmail.com> From: Aleksandar Markovic Date: Tue, 26 Nov 2019 02:08:57 +0100 Message-ID: Subject: Re: [PATCH v36 12/17] target/avr: Add example board configuration To: Michael Rolnik Content-Type: multipart/alternative; boundary="000000000000515422059835860a" X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "thuth@redhat.com" , "richard.henderson@linaro.org" , "qemu-devel@nongnu.org" , "dovgaluk@ispras.ru" , "imammedo@redhat.com" , "philmd@redhat.com" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000515422059835860a Content-Type: text/plain; charset="UTF-8" On Sunday, November 24, 2019, Michael Rolnik wrote: > A simple board setup that configures an AVR CPU to run a given firmware > image. > This is all that's useful to implement without peripheral emulation as AVR > CPUs include a lot of on-board peripherals. > > NOTE: this is not a real board !!!! > NOTE: it's used for CPU testing!!!! > > Signed-off-by: Michael Rolnik > --- Given the complexities of peripherals of AVR CPUs, in my opinion it would be overly demanding to the submitters to require a real machine emulation at this point of time. So: Reviewed-by: Aleksandar Markovic Hopefully this will superceeded with a real board emulation in not so distsnt future. Philippe, do you have something to add? > > hw/avr/sample.c | 282 +++++++++++++++++++++++++++++++++++++++++++ > hw/Kconfig | 1 + > hw/avr/Kconfig | 6 + > hw/avr/Makefile.objs | 1 + > 4 files changed, 290 insertions(+) > create mode 100644 hw/avr/sample.c > create mode 100644 hw/avr/Kconfig > create mode 100644 hw/avr/Makefile.objs > > diff --git a/hw/avr/sample.c b/hw/avr/sample.c > new file mode 100644 > index 0000000000..2295ec1b79 > --- /dev/null > +++ b/hw/avr/sample.c > @@ -0,0 +1,282 @@ > +/* > + * QEMU AVR CPU > + * > + * Copyright (c) 2019 Michael Rolnik > + * > + * This library is free software; you can redistribute it and/or > + * modify it under the terms of the GNU Lesser General Public > + * License as published by the Free Software Foundation; either > + * version 2.1 of the License, or (at your option) any later version. > + * > + * This library is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + * Lesser General Public License for more details. > + * > + * You should have received a copy of the GNU Lesser General Public > + * License along with this library; if not, see > + * > + */ > + > +/* > + * NOTE: > + * This is not a real AVR board, this is an example! > + * The CPU is an approximation of an ATmega2560, but is missing > various > + * built-in peripherals. > + * > + * This example board loads provided binary file into flash memory > and > + * executes it from 0x00000000 address in the code memory space. > + * > + * Currently used for AVR CPU validation > + * > + */ > + > +#include "qemu/osdep.h" > +#include "qapi/error.h" > +#include "qemu-common.h" > +#include "cpu.h" > +#include "hw/hw.h" > +#include "sysemu/sysemu.h" > +#include "sysemu/qtest.h" > +#include "ui/console.h" > +#include "hw/boards.h" > +#include "hw/loader.h" > +#include "qemu/error-report.h" > +#include "exec/address-spaces.h" > +#include "include/hw/sysbus.h" > +#include "include/hw/char/avr_usart.h" > +#include "include/hw/timer/avr_timer16.h" > +#include "include/hw/misc/avr_mask.h" > +#include "elf.h" > +#include "hw/misc/unimp.h" > + > +#define SIZE_FLASH 0x00040000 > +#define SIZE_SRAM 0x00002000 > +/* > + * Size of additional "external" memory, as if the AVR were configured to > use > + * an external RAM chip. > + * Note that the configuration registers that normally enable this > feature are > + * unimplemented. > + */ > +#define SIZE_EXMEM 0x00000000 > + > +/* Offsets of peripherals in emulated memory space (i.e. not host > addresses) */ > +#define PRR0_BASE 0x64 > +#define PRR1_BASE 0x65 > +#define USART_BASE 0xc0 > +#define TIMER1_BASE 0x80 > +#define TIMER1_IMSK_BASE 0x6f > +#define TIMER1_IFR_BASE 0x36 > + > +/* Interrupt numbers used by peripherals */ > +#define USART_RXC_IRQ 24 > +#define USART_DRE_IRQ 25 > +#define USART_TXC_IRQ 26 > + > +#define TIMER1_CAPT_IRQ 15 > +#define TIMER1_COMPA_IRQ 16 > +#define TIMER1_COMPB_IRQ 17 > +#define TIMER1_COMPC_IRQ 18 > +#define TIMER1_OVF_IRQ 19 > + > +/* Power reduction */ > +#define PRR1_BIT_PRTIM5 0x05 /* Timer/Counter5 */ > +#define PRR1_BIT_PRTIM4 0x04 /* Timer/Counter4 */ > +#define PRR1_BIT_PRTIM3 0x03 /* Timer/Counter3 */ > +#define PRR1_BIT_PRUSART3 0x02 /* USART3 */ > +#define PRR1_BIT_PRUSART2 0x01 /* USART2 */ > +#define PRR1_BIT_PRUSART1 0x00 /* USART1 */ > + > +#define PRR0_BIT_PRTWI 0x06 /* TWI */ > +#define PRR0_BIT_PRTIM2 0x05 /* Timer/Counter2 */ > +#define PRR0_BIT_PRTIM0 0x04 /* Timer/Counter0 */ > +#define PRR0_BIT_PRTIM1 0x03 /* Timer/Counter1 */ > +#define PRR0_BIT_PRSPI 0x02 /* Serial Peripheral Interface */ > +#define PRR0_BIT_PRUSART0 0x01 /* USART0 */ > +#define PRR0_BIT_PRADC 0x00 /* ADC */ > + > +typedef struct { > + MachineClass parent; > +} SampleMachineClass; > + > +typedef struct { > + MachineState parent; > + MemoryRegion *ram; > + MemoryRegion *flash; > + AVRUsartState *usart0; > + AVRTimer16State *timer1; > + AVRMaskState *prr[2]; > +} SampleMachineState; > + > +#define TYPE_SAMPLE_MACHINE MACHINE_TYPE_NAME("sample") > + > +#define SAMPLE_MACHINE(obj) \ > + OBJECT_CHECK(SampleMachineState, obj, TYPE_SAMPLE_MACHINE) > +#define SAMPLE_MACHINE_GET_CLASS(obj) \ > + OBJECT_GET_CLASS(SampleMachineClass, obj, TYPE_SAMPLE_MACHINE) > +#define SAMPLE_MACHINE_CLASS(klass) \ > + OBJECT_CLASS_CHECK(SampleMachineClass, klass, TYPE_SAMPLE_MACHINE) > + > +static void sample_init(MachineState *machine) > +{ > + SampleMachineState *sms = SAMPLE_MACHINE(machine); > + MemoryRegion *system_memory = get_system_memory(); > + AVRCPU *cpu; > + const char *firmware = NULL; > + const char *filename; > + int bytes_loaded; > + SysBusDevice *busdev; > + DeviceState *cpudev; > + > + system_memory = get_system_memory(); > + sms->ram = g_new(MemoryRegion, 1); > + sms->flash = g_new(MemoryRegion, 1); > + > + cpu = AVR_CPU(cpu_create(machine->cpu_type)); > + cpudev = DEVICE(cpu); > + > + > + memory_region_init_rom(sms->flash, NULL, "avr.flash", SIZE_FLASH, > + &error_fatal); > + memory_region_add_subregion(system_memory, OFFSET_CODE, sms->flash); > + > + /* following are atmel2560 device */ > + create_unimplemented_device("usart 3", OFFSET_DATA + 0x0130, 0x0007); > + create_unimplemented_device("timer-counter-16bit 5", > + OFFSET_DATA + 0x0120, 0x000e); > + create_unimplemented_device("gpio L", OFFSET_DATA + 0x0109, 0x0003); > + create_unimplemented_device("gpio K", OFFSET_DATA + 0x0106, 0x0003); > + create_unimplemented_device("gpio J", OFFSET_DATA + 0x0103, 0x0003); > + create_unimplemented_device("gpio H", OFFSET_DATA + 0x0100, 0x0003); > + create_unimplemented_device("usart 2", OFFSET_DATA + 0x00d0, 0x0007); > + create_unimplemented_device("usart 1", OFFSET_DATA + 0x00c8, 0x0007); > + create_unimplemented_device("usart 0", OFFSET_DATA + 0x00c0, 0x0007); > + create_unimplemented_device("twi", OFFSET_DATA + 0x00b8, 0x0006); > + create_unimplemented_device("timer-counter-async-8bit 2", > + OFFSET_DATA + 0x00b0, 0x0007); > + create_unimplemented_device("timer-counter-16bit 4", > + OFFSET_DATA + 0x00a0, 0x000e); > + create_unimplemented_device("timer-counter-16bit 3", > + OFFSET_DATA + 0x0090, 0x000e); > + create_unimplemented_device("timer-counter-16bit 1", > + OFFSET_DATA + 0x0080, 0x000e); > + create_unimplemented_device("ac / adc", > + OFFSET_DATA + 0x0078, 0x0008); > + create_unimplemented_device("ext-mem-iface", > + OFFSET_DATA + 0x0074, 0x0002); > + create_unimplemented_device("int-controller", > + OFFSET_DATA + 0x0068, 0x000c); > + create_unimplemented_device("sys", > + OFFSET_DATA + 0x0060, 0x0007); > + create_unimplemented_device("spi", > + OFFSET_DATA + 0x004c, 0x0003); > + create_unimplemented_device("ext-mem-iface", > + OFFSET_DATA + 0x004a, 0x0002); > + create_unimplemented_device("timer-counter-pwm-8bit 0", > + OFFSET_DATA + 0x0043, 0x0006); > + create_unimplemented_device("ext-mem-iface", > + OFFSET_DATA + 0x003e, 0x0005); > + create_unimplemented_device("int-controller", > + OFFSET_DATA + 0x0035, 0x0009); > + create_unimplemented_device("gpio G", OFFSET_DATA + 0x0032, 0x0003); > + create_unimplemented_device("gpio F", OFFSET_DATA + 0x002f, 0x0003); > + create_unimplemented_device("gpio E", OFFSET_DATA + 0x002c, 0x0003); > + create_unimplemented_device("gpio D", OFFSET_DATA + 0x0029, 0x0003); > + create_unimplemented_device("gpio C", OFFSET_DATA + 0x0026, 0x0003); > + create_unimplemented_device("gpio B", OFFSET_DATA + 0x0023, 0x0003); > + create_unimplemented_device("gpio A", OFFSET_DATA + 0x0020, 0x0003); > + > + memory_region_allocate_system_memory( > + sms->ram, NULL, "avr.ram", SIZE_SRAM + SIZE_EXMEM); > + memory_region_add_subregion(system_memory, OFFSET_DATA + 0x200, > sms->ram); > + > + /* Power Reduction built-in peripheral */ > + sms->prr[0] = AVR_MASK(sysbus_create_simple(TYPE_AVR_MASK, > + OFFSET_DATA + PRR0_BASE, NULL)); > + sms->prr[1] = AVR_MASK(sysbus_create_simple(TYPE_AVR_MASK, > + OFFSET_DATA + PRR1_BASE, NULL)); > + > + /* USART 0 built-in peripheral */ > + sms->usart0 = AVR_USART(object_new(TYPE_AVR_USART)); > + busdev = SYS_BUS_DEVICE(sms->usart0); > + qdev_prop_set_chr(DEVICE(sms->usart0), "chardev", serial_hd(0)); > + object_property_set_bool(OBJECT(sms->usart0), true, "realized", > + &error_fatal); > + sysbus_mmio_map(busdev, 0, OFFSET_DATA + USART_BASE); > + /* > + * These IRQ numbers don't match the datasheet because we're counting > from > + * zero and not including reset. > + */ > + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(cpudev, > USART_RXC_IRQ)); > + sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(cpudev, > USART_DRE_IRQ)); > + sysbus_connect_irq(busdev, 2, qdev_get_gpio_in(cpudev, > USART_TXC_IRQ)); > + sysbus_connect_irq(SYS_BUS_DEVICE(sms->prr[1]), PRR1_BIT_PRUSART1, > + qdev_get_gpio_in(DEVICE(sms->usart0), 0)); > + > + /* Timer 1 built-in periphal */ > + sms->timer1 = AVR_TIMER16(object_new(TYPE_AVR_TIMER16)); > + object_property_set_bool(OBJECT(sms->timer1), true, "realized", > + &error_fatal); > + busdev = SYS_BUS_DEVICE(sms->timer1); > + sysbus_mmio_map(busdev, 0, OFFSET_DATA + TIMER1_BASE); > + sysbus_mmio_map(busdev, 1, OFFSET_DATA + TIMER1_IMSK_BASE); > + sysbus_mmio_map(busdev, 2, OFFSET_DATA + TIMER1_IFR_BASE); > + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(cpudev, > TIMER1_CAPT_IRQ)); > + sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(cpudev, > TIMER1_COMPA_IRQ)); > + sysbus_connect_irq(busdev, 2, qdev_get_gpio_in(cpudev, > TIMER1_COMPB_IRQ)); > + sysbus_connect_irq(busdev, 3, qdev_get_gpio_in(cpudev, > TIMER1_COMPC_IRQ)); > + sysbus_connect_irq(busdev, 4, qdev_get_gpio_in(cpudev, > TIMER1_OVF_IRQ)); > + sysbus_connect_irq(SYS_BUS_DEVICE(sms->prr[0]), PRR0_BIT_PRTIM1, > + qdev_get_gpio_in(DEVICE(sms->timer1), 0)); > + > + /* Load firmware (contents of flash) trying to auto-detect format */ > + firmware = machine->firmware; > + if (firmware != NULL) { > + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware); > + if (filename == NULL) { > + error_report("Unable to find %s", firmware); > + exit(1); > + } > + > + bytes_loaded = load_elf( > + filename, NULL, NULL, NULL, NULL, NULL, NULL, 0, EM_NONE, 0, > 0); > + if (bytes_loaded < 0) { > + bytes_loaded = load_image_targphys( > + filename, OFFSET_CODE, SIZE_FLASH); > + } > + if (bytes_loaded < 0) { > + error_report( > + "Unable to load firmware image %s as ELF or raw binary", > + firmware); > + exit(1); > + } > + } > +} > + > +static void sample_class_init(ObjectClass *oc, void *data) > +{ > + MachineClass *mc = MACHINE_CLASS(oc); > + > + mc->desc = "AVR sample/example board (ATmega2560)"; > + mc->init = sample_init; > + mc->default_cpus = 1; > + mc->min_cpus = mc->default_cpus; > + mc->max_cpus = mc->default_cpus; > + mc->default_cpu_type = "avr6-avr-cpu"; /* ATmega2560. */ > + mc->is_default = 1; > +} > + > +static const TypeInfo sample_info = { > + .name = TYPE_SAMPLE_MACHINE, > + .parent = TYPE_MACHINE, > + .instance_size = sizeof(SampleMachineState), > + .class_size = sizeof(SampleMachineClass), > + .class_init = sample_class_init, > +}; > + > +static void sample_machine_init(void) > +{ > + type_register_static(&sample_info); > +} > + > +type_init(sample_machine_init); > diff --git a/hw/Kconfig b/hw/Kconfig > index b9685b3944..07b8abb342 100644 > --- a/hw/Kconfig > +++ b/hw/Kconfig > @@ -44,6 +44,7 @@ source watchdog/Kconfig > # arch Kconfig > source arm/Kconfig > source alpha/Kconfig > +source avr/Kconfig > source cris/Kconfig > source hppa/Kconfig > source i386/Kconfig > diff --git a/hw/avr/Kconfig b/hw/avr/Kconfig > new file mode 100644 > index 0000000000..92aa1e6afb > --- /dev/null > +++ b/hw/avr/Kconfig > @@ -0,0 +1,6 @@ > +config AVR_SAMPLE > + bool > + select AVR_TIMER16 > + select AVR_USART > + select AVR_MASK > + select UNIMP > diff --git a/hw/avr/Makefile.objs b/hw/avr/Makefile.objs > new file mode 100644 > index 0000000000..626b7064b3 > --- /dev/null > +++ b/hw/avr/Makefile.objs > @@ -0,0 +1 @@ > +obj-y += sample.o > -- > 2.17.2 (Apple Git-113) > > --000000000000515422059835860a Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

On Sunday, November 24, 2019, Michael Rolnik <mrolnik@gmail.com> wrote:
A simple board setup that configures an AVR CPU to run a given f= irmware image.
This is all that's useful to implement without peripheral emulation as = AVR CPUs include a lot of on-board peripherals.

NOTE: this is not a real board !!!!
NOTE: it's used for CPU testing!!!!

Signed-off-by: Michael Rolnik <mrol= nik@gmail.com>
---

Given the complexities of peripherals o= f AVR CPUs, in my opinion it would be overly demanding to the submitters to= require a real machine emulation at this point of time. So:

=
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>

Hopefully this will superceeded with a real board em= ulation in not so distsnt future.

Philippe, do you= have something to add?

=

hw/avr/sample.c=C2=A0 =C2=A0 =C2=A0 | 282 ++++++++++++= +++++++++++++++++++++++++++++++
=C2=A0hw/Kconfig=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 =C2=A01 +<= br> =C2=A0hw/avr/Kconfig=C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 =C2=A06 +
=C2=A0hw/avr/Makefile.objs |=C2=A0 =C2=A01 +
=C2=A04 files changed, 290 insertions(+)
=C2=A0create mode 100644 hw/avr/sample.c
=C2=A0create mode 100644 hw/avr/Kconfig
=C2=A0create mode 100644 hw/avr/Makefile.objs

diff --git a/hw/avr/sample.c b/hw/avr/sample.c
new file mode 100644
index 0000000000..2295ec1b79
--- /dev/null
+++ b/hw/avr/sample.c
@@ -0,0 +1,282 @@
+/*
+ * QEMU AVR CPU
+ *
+ * Copyright (c) 2019 Michael Rolnik
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.=C2=A0 See the GNU<= br> + * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+
+/*
+ *=C2=A0 NOTE:
+ *=C2=A0 =C2=A0 =C2=A0 This is not a real AVR board, this is an example! + *=C2=A0 =C2=A0 =C2=A0 The CPU is an approximation of an ATmega2560, but i= s missing various
+ *=C2=A0 =C2=A0 =C2=A0 built-in peripherals.
+ *
+ *=C2=A0 =C2=A0 =C2=A0 This example board loads provided binary file into = flash memory and
+ *=C2=A0 =C2=A0 =C2=A0 executes it from 0x00000000 address in the code mem= ory space.
+ *
+ *=C2=A0 =C2=A0 =C2=A0 Currently used for AVR CPU validation
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "hw/hw.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/qtest.h"
+#include "ui/console.h"
+#include "hw/boards.h"
+#include "hw/loader.h"
+#include "qemu/error-report.h"
+#include "exec/address-spaces.h"
+#include "include/hw/sysbus.h"
+#include "include/hw/char/avr_usart.h"
+#include "include/hw/timer/avr_timer16.h"
+#include "include/hw/misc/avr_mask.h"
+#include "elf.h"
+#include "hw/misc/unimp.h"
+
+#define SIZE_FLASH 0x00040000
+#define SIZE_SRAM 0x00002000
+/*
+ * Size of additional "external" memory, as if the AVR were conf= igured to use
+ * an external RAM chip.
+ * Note that the configuration registers that normally enable this feature= are
+ * unimplemented.
+ */
+#define SIZE_EXMEM 0x00000000
+
+/* Offsets of peripherals in emulated memory space (i.e. not host addresse= s)=C2=A0 */
+#define PRR0_BASE 0x64
+#define PRR1_BASE 0x65
+#define USART_BASE 0xc0
+#define TIMER1_BASE 0x80
+#define TIMER1_IMSK_BASE 0x6f
+#define TIMER1_IFR_BASE 0x36
+
+/* Interrupt numbers used by peripherals */
+#define USART_RXC_IRQ 24
+#define USART_DRE_IRQ 25
+#define USART_TXC_IRQ 26
+
+#define TIMER1_CAPT_IRQ 15
+#define TIMER1_COMPA_IRQ 16
+#define TIMER1_COMPB_IRQ 17
+#define TIMER1_COMPC_IRQ 18
+#define TIMER1_OVF_IRQ 19
+
+/*=C2=A0 Power reduction=C2=A0 =C2=A0 =C2=A0*/
+#define PRR1_BIT_PRTIM5=C2=A0 =C2=A0 =C2=A00x05=C2=A0 =C2=A0 /*=C2=A0 Time= r/Counter5=C2=A0 */
+#define PRR1_BIT_PRTIM4=C2=A0 =C2=A0 =C2=A00x04=C2=A0 =C2=A0 /*=C2=A0 Time= r/Counter4=C2=A0 */
+#define PRR1_BIT_PRTIM3=C2=A0 =C2=A0 =C2=A00x03=C2=A0 =C2=A0 /*=C2=A0 Time= r/Counter3=C2=A0 */
+#define PRR1_BIT_PRUSART3=C2=A0 =C2=A00x02=C2=A0 =C2=A0 /*=C2=A0 USART3=C2= =A0 */
+#define PRR1_BIT_PRUSART2=C2=A0 =C2=A00x01=C2=A0 =C2=A0 /*=C2=A0 USART2=C2= =A0 */
+#define PRR1_BIT_PRUSART1=C2=A0 =C2=A00x00=C2=A0 =C2=A0 /*=C2=A0 USART1=C2= =A0 */
+
+#define PRR0_BIT_PRTWI=C2=A0 =C2=A0 =C2=A0 0x06=C2=A0 =C2=A0 /*=C2=A0 TWI = */
+#define PRR0_BIT_PRTIM2=C2=A0 =C2=A0 =C2=A00x05=C2=A0 =C2=A0 /*=C2=A0 Time= r/Counter2=C2=A0 */
+#define PRR0_BIT_PRTIM0=C2=A0 =C2=A0 =C2=A00x04=C2=A0 =C2=A0 /*=C2=A0 Time= r/Counter0=C2=A0 */
+#define PRR0_BIT_PRTIM1=C2=A0 =C2=A0 =C2=A00x03=C2=A0 =C2=A0 /*=C2=A0 Time= r/Counter1=C2=A0 */
+#define PRR0_BIT_PRSPI=C2=A0 =C2=A0 =C2=A0 0x02=C2=A0 =C2=A0 /*=C2=A0 Seri= al Peripheral Interface */
+#define PRR0_BIT_PRUSART0=C2=A0 =C2=A00x01=C2=A0 =C2=A0 /*=C2=A0 USART0=C2= =A0 */
+#define PRR0_BIT_PRADC=C2=A0 =C2=A0 =C2=A0 0x00=C2=A0 =C2=A0 /*=C2=A0 ADC = */
+
+typedef struct {
+=C2=A0 =C2=A0 MachineClass parent;
+} SampleMachineClass;
+
+typedef struct {
+=C2=A0 =C2=A0 MachineState parent;
+=C2=A0 =C2=A0 MemoryRegion *ram;
+=C2=A0 =C2=A0 MemoryRegion *flash;
+=C2=A0 =C2=A0 AVRUsartState *usart0;
+=C2=A0 =C2=A0 AVRTimer16State *timer1;
+=C2=A0 =C2=A0 AVRMaskState *prr[2];
+} SampleMachineState;
+
+#define TYPE_SAMPLE_MACHINE MACHINE_TYPE_NAME("sample")
+
+#define SAMPLE_MACHINE(obj) \
+=C2=A0 =C2=A0 OBJECT_CHECK(SampleMachineState, obj, TYPE_SAMPLE_MACHI= NE)
+#define SAMPLE_MACHINE_GET_CLASS(obj) \
+=C2=A0 =C2=A0 OBJECT_GET_CLASS(SampleMachineClass, obj, TYPE_SAMPLE_M= ACHINE)
+#define SAMPLE_MACHINE_CLASS(klass) \
+=C2=A0 =C2=A0 OBJECT_CLASS_CHECK(SampleMachineClass, klass, TYPE_SAMP= LE_MACHINE)
+
+static void sample_init(MachineState *machine)
+{
+=C2=A0 =C2=A0 SampleMachineState *sms =3D SAMPLE_MACHINE(machine);
+=C2=A0 =C2=A0 MemoryRegion *system_memory =3D get_system_memory();
+=C2=A0 =C2=A0 AVRCPU *cpu;
+=C2=A0 =C2=A0 const char *firmware =3D NULL;
+=C2=A0 =C2=A0 const char *filename;
+=C2=A0 =C2=A0 int bytes_loaded;
+=C2=A0 =C2=A0 SysBusDevice *busdev;
+=C2=A0 =C2=A0 DeviceState *cpudev;
+
+=C2=A0 =C2=A0 system_memory =3D get_system_memory();
+=C2=A0 =C2=A0 sms->ram =3D g_new(MemoryRegion, 1);
+=C2=A0 =C2=A0 sms->flash =3D g_new(MemoryRegion, 1);
+
+=C2=A0 =C2=A0 cpu =3D AVR_CPU(cpu_create(machine->cpu_type));
+=C2=A0 =C2=A0 cpudev =3D DEVICE(cpu);
+
+
+=C2=A0 =C2=A0 memory_region_init_rom(sms->flash, NULL, "avr.f= lash", SIZE_FLASH,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &error_fatal);
+=C2=A0 =C2=A0 memory_region_add_subregion(system_memory, OFFSET_CODE,= sms->flash);
+
+=C2=A0 =C2=A0 /* following are atmel2560 device */
+=C2=A0 =C2=A0 create_unimplemented_device("usart 3", OFFSET= _DATA + 0x0130, 0x0007);
+=C2=A0 =C2=A0 create_unimplemented_device("timer-counter-16bit 5= ",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0120, 0x000e); +=C2=A0 =C2=A0 create_unimplemented_device("gpio L", OFFSET_= DATA + 0x0109, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio K", OFFSET_= DATA + 0x0106, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio J", OFFSET_= DATA + 0x0103, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio H", OFFSET_= DATA + 0x0100, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("usart 2", OFFSET= _DATA + 0x00d0, 0x0007);
+=C2=A0 =C2=A0 create_unimplemented_device("usart 1", OFFSET= _DATA + 0x00c8, 0x0007);
+=C2=A0 =C2=A0 create_unimplemented_device("usart 0", OFFSET= _DATA + 0x00c0, 0x0007);
+=C2=A0 =C2=A0 create_unimplemented_device("twi", OFFSET_DAT= A + 0x00b8, 0x0006);
+=C2=A0 =C2=A0 create_unimplemented_device("timer-counter-async-8= bit 2",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x00b0, 0x0007); +=C2=A0 =C2=A0 create_unimplemented_device("timer-counter-16bit 4= ",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x00a0, 0x000e); +=C2=A0 =C2=A0 create_unimplemented_device("timer-counter-16bit 3= ",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0090, 0x000e); +=C2=A0 =C2=A0 create_unimplemented_device("timer-counter-16bit 1= ",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0080, 0x000e); +=C2=A0 =C2=A0 create_unimplemented_device("ac / adc",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0078, 0x0008); +=C2=A0 =C2=A0 create_unimplemented_device("ext-mem-iface",<= br> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0074, 0x0002); +=C2=A0 =C2=A0 create_unimplemented_device("int-controller",=
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0068, 0x000c); +=C2=A0 =C2=A0 create_unimplemented_device("sys",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0060, 0x0007); +=C2=A0 =C2=A0 create_unimplemented_device("spi",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x004c, 0x0003); +=C2=A0 =C2=A0 create_unimplemented_device("ext-mem-iface",<= br> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x004a, 0x0002); +=C2=A0 =C2=A0 create_unimplemented_device("timer-counter-pwm-8bi= t 0",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0043, 0x0006); +=C2=A0 =C2=A0 create_unimplemented_device("ext-mem-iface",<= br> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x003e, 0x0005); +=C2=A0 =C2=A0 create_unimplemented_device("int-controller",=
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFSET_DATA + 0x0035, 0x0009); +=C2=A0 =C2=A0 create_unimplemented_device("gpio G", OFFSET_= DATA + 0x0032, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio F", OFFSET_= DATA + 0x002f, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio E", OFFSET_= DATA + 0x002c, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio D", OFFSET_= DATA + 0x0029, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio C", OFFSET_= DATA + 0x0026, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio B", OFFSET_= DATA + 0x0023, 0x0003);
+=C2=A0 =C2=A0 create_unimplemented_device("gpio A", OFFSET_= DATA + 0x0020, 0x0003);
+
+=C2=A0 =C2=A0 memory_region_allocate_system_memory(
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 sms->ram, NULL, "avr.ram", SIZE_S= RAM + SIZE_EXMEM);
+=C2=A0 =C2=A0 memory_region_add_subregion(system_memory, OFFSET_DATA = + 0x200, sms->ram);
+
+=C2=A0 =C2=A0 /* Power Reduction built-in peripheral */
+=C2=A0 =C2=A0 sms->prr[0] =3D AVR_MASK(sysbus_create_simple(TYPE_A= VR_MASK,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFS= ET_DATA + PRR0_BASE, NULL));
+=C2=A0 =C2=A0 sms->prr[1] =3D AVR_MASK(sysbus_create_simple(TYPE_A= VR_MASK,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OFFS= ET_DATA + PRR1_BASE, NULL));
+
+=C2=A0 =C2=A0 /* USART 0 built-in peripheral */
+=C2=A0 =C2=A0 sms->usart0 =3D AVR_USART(object_new(TYPE_AVR_USART)= );
+=C2=A0 =C2=A0 busdev =3D SYS_BUS_DEVICE(sms->usart0);
+=C2=A0 =C2=A0 qdev_prop_set_chr(DEVICE(sms->usart0), "chardev= ", serial_hd(0));
+=C2=A0 =C2=A0 object_property_set_bool(OBJECT(sms->usart0), true, = "realized",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &error_fatal);
+=C2=A0 =C2=A0 sysbus_mmio_map(busdev, 0, OFFSET_DATA + USART_BASE);
+=C2=A0 =C2=A0 /*
+=C2=A0 =C2=A0 =C2=A0* These IRQ numbers don't match the datasheet beca= use we're counting from
+=C2=A0 =C2=A0 =C2=A0* zero and not including reset.
+=C2=A0 =C2=A0 =C2=A0*/
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(cpudev, USART= _RXC_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(cpudev, USART= _DRE_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 2, qdev_get_gpio_in(cpudev, USART= _TXC_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(SYS_BUS_DEVICE(sms->prr[1]), PRR1= _BIT_PRUSART1,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qdev_get_gpio_in(DEVICE(sms->= usart0), 0));
+
+=C2=A0 =C2=A0 /* Timer 1 built-in periphal */
+=C2=A0 =C2=A0 sms->timer1 =3D AVR_TIMER16(object_new(TYPE_AVR_TIME= R16));
+=C2=A0 =C2=A0 object_property_set_bool(OBJECT(sms->timer1), true, = "realized",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &error_fatal);
+=C2=A0 =C2=A0 busdev =3D SYS_BUS_DEVICE(sms->timer1);
+=C2=A0 =C2=A0 sysbus_mmio_map(busdev, 0, OFFSET_DATA + TIMER1_BASE);
+=C2=A0 =C2=A0 sysbus_mmio_map(busdev, 1, OFFSET_DATA + TIMER1_IMSK_BASE);<= br> +=C2=A0 =C2=A0 sysbus_mmio_map(busdev, 2, OFFSET_DATA + TIMER1_IFR_BASE); +=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(cpudev, TIMER= 1_CAPT_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(cpudev, TIMER= 1_COMPA_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 2, qdev_get_gpio_in(cpudev, TIMER= 1_COMPB_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 3, qdev_get_gpio_in(cpudev, TIMER= 1_COMPC_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(busdev, 4, qdev_get_gpio_in(cpudev, TIMER= 1_OVF_IRQ));
+=C2=A0 =C2=A0 sysbus_connect_irq(SYS_BUS_DEVICE(sms->prr[0]), PRR0= _BIT_PRTIM1,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qdev_get_gpio_in(DEVICE(sms->= timer1), 0));
+
+=C2=A0 =C2=A0 /* Load firmware (contents of flash) trying to auto-detect f= ormat */
+=C2=A0 =C2=A0 firmware =3D machine->firmware;
+=C2=A0 =C2=A0 if (firmware !=3D NULL) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (filename =3D=3D NULL) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_report("Unable to fin= d %s", firmware);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 exit(1);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 bytes_loaded =3D load_elf(
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 filename, NULL, NULL, NULL, NULL= , NULL, NULL, 0, EM_NONE, 0, 0);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (bytes_loaded < 0) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 bytes_loaded =3D load_image_targ= phys(
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 filename, OFFSET_C= ODE, SIZE_FLASH);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (bytes_loaded < 0) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_report(
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 "Unable to lo= ad firmware image %s as ELF or raw binary",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 firmware);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 exit(1);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
+=C2=A0 =C2=A0 }
+}
+
+static void sample_class_init(ObjectClass *oc, void *data)
+{
+=C2=A0 =C2=A0 MachineClass *mc =3D MACHINE_CLASS(oc);
+
+=C2=A0 =C2=A0 mc->desc =3D "AVR sample/example board (ATmega2560)&= quot;;
+=C2=A0 =C2=A0 mc->init =3D sample_init;
+=C2=A0 =C2=A0 mc->default_cpus =3D 1;
+=C2=A0 =C2=A0 mc->min_cpus =3D mc->default_cpus;
+=C2=A0 =C2=A0 mc->max_cpus =3D mc->default_cpus;
+=C2=A0 =C2=A0 mc->default_cpu_type =3D "avr6-avr-cpu"; /* ATm= ega2560. */
+=C2=A0 =C2=A0 mc->is_default =3D 1;
+}
+
+static const TypeInfo sample_info =3D {
+=C2=A0 =C2=A0 .name =3D TYPE_SAMPLE_MACHINE,
+=C2=A0 =C2=A0 .parent =3D TYPE_MACHINE,
+=C2=A0 =C2=A0 .instance_size =3D sizeof(SampleMachineState),
+=C2=A0 =C2=A0 .class_size =3D sizeof(SampleMachineClass),
+=C2=A0 =C2=A0 .class_init =3D sample_class_init,
+};
+
+static void sample_machine_init(void)
+{
+=C2=A0 =C2=A0 type_register_static(&sample_info);
+}
+
+type_init(sample_machine_init);
diff --git a/hw/Kconfig b/hw/Kconfig
index b9685b3944..07b8abb342 100644
--- a/hw/Kconfig
+++ b/hw/Kconfig
@@ -44,6 +44,7 @@ source watchdog/Kconfig
=C2=A0# arch Kconfig
=C2=A0source arm/Kconfig
=C2=A0source alpha/Kconfig
+source avr/Kconfig
=C2=A0source cris/Kconfig
=C2=A0source hppa/Kconfig
=C2=A0source i386/Kconfig
diff --git a/hw/avr/Kconfig b/hw/avr/Kconfig
new file mode 100644
index 0000000000..92aa1e6afb
--- /dev/null
+++ b/hw/avr/Kconfig
@@ -0,0 +1,6 @@
+config AVR_SAMPLE
+=C2=A0 =C2=A0 bool
+=C2=A0 =C2=A0 select AVR_TIMER16
+=C2=A0 =C2=A0 select AVR_USART
+=C2=A0 =C2=A0 select AVR_MASK
+=C2=A0 =C2=A0 select UNIMP
diff --git a/hw/avr/Makefile.objs b/hw/avr/Makefile.objs
new file mode 100644
index 0000000000..626b7064b3
--- /dev/null
+++ b/hw/avr/Makefile.objs
@@ -0,0 +1 @@
+obj-y +=3D sample.o
--
2.17.2 (Apple Git-113)

--000000000000515422059835860a--