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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , QEMU Developers , Aleksandar Markovic , Huacai Chen , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Jun 1, 2020 at 11:01 AM Aleksandar Markovic wrote: > > On Sun, May 3, 2020 at 12:24 PM Huacai Chen wrote: > > > > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we > > can't create a VZ guest in QEMU because it lacks the kvm_type() hook in > > MachineClass. Besides, libvirt uses a null-machine to detect the kvm > > capability, so by default it will return "KVM not supported" on a VZ > > platform. Thus, null-machine also need the kvm_type() hook. > > > > Signed-off-by: Huacai Chen > > Co-developed-by: Jiaxun Yang > > --- > > Applied to MIPS queue. > Huacai, There were some problems during integration of this patch that I do before any pull request. I will for now omit it from the pull request I plan to send today. I leave to you to integrate the patch in some future series of yours, the one that will complete KVM support for Loongson 3. In other words, this patch is "unapplied" to MIPS queue. Best Regards, Aleksandar > Best Regards, > Aleksandar > > > hw/core/Makefile.objs | 2 +- > > hw/core/null-machine.c | 4 ++++ > > hw/mips/Makefile.objs | 2 +- > > hw/mips/common.c | 31 +++++++++++++++++++++++++++++++ > > include/hw/mips/mips.h | 3 +++ > > 5 files changed, 40 insertions(+), 2 deletions(-) > > create mode 100644 hw/mips/common.c > > > > diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs > > index 1d540ed..b5672f4 100644 > > --- a/hw/core/Makefile.objs > > +++ b/hw/core/Makefile.objs > > @@ -17,11 +17,11 @@ common-obj-$(CONFIG_SOFTMMU) += vm-change-state-handler.o > > common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o > > common-obj-$(CONFIG_SOFTMMU) += sysbus.o > > common-obj-$(CONFIG_SOFTMMU) += machine.o > > -common-obj-$(CONFIG_SOFTMMU) += null-machine.o > > common-obj-$(CONFIG_SOFTMMU) += loader.o > > common-obj-$(CONFIG_SOFTMMU) += machine-hmp-cmds.o > > common-obj-$(CONFIG_SOFTMMU) += numa.o > > common-obj-$(CONFIG_SOFTMMU) += clock-vmstate.o > > +obj-$(CONFIG_SOFTMMU) += null-machine.o > > obj-$(CONFIG_SOFTMMU) += machine-qmp-cmds.o > > > > common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o > > diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c > > index cb47d9d..94a36f9 100644 > > --- a/hw/core/null-machine.c > > +++ b/hw/core/null-machine.c > > @@ -17,6 +17,7 @@ > > #include "sysemu/sysemu.h" > > #include "exec/address-spaces.h" > > #include "hw/core/cpu.h" > > +#include "hw/mips/mips.h" > > > > static void machine_none_init(MachineState *mch) > > { > > @@ -50,6 +51,9 @@ static void machine_none_machine_init(MachineClass *mc) > > mc->max_cpus = 1; > > mc->default_ram_size = 0; > > mc->default_ram_id = "ram"; > > +#ifdef TARGET_MIPS > > + mc->kvm_type = mips_kvm_type; > > +#endif > > } > > > > DEFINE_MACHINE("none", machine_none_machine_init) > > diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs > > index 525809a..2f7795b 100644 > > --- a/hw/mips/Makefile.objs > > +++ b/hw/mips/Makefile.objs > > @@ -1,4 +1,4 @@ > > -obj-y += addr.o mips_int.o > > +obj-y += addr.o common.o mips_int.o > > obj-$(CONFIG_R4K) += mips_r4k.o > > obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o > > obj-$(CONFIG_MIPSSIM) += mips_mipssim.o > > diff --git a/hw/mips/common.c b/hw/mips/common.c > > new file mode 100644 > > index 0000000..0e33bd0 > > --- /dev/null > > +++ b/hw/mips/common.c > > @@ -0,0 +1,31 @@ > > +/* > > + * Common MIPS routines > > + * > > + * Copyright (c) 2020 Huacai Chen (chenhc@lemote.com) > > + * This code is licensed under the GNU GPL v2. > > + */ > > + > > +#include > > +#include "qemu/osdep.h" > > +#include "qemu-common.h" > > +#include "hw/boards.h" > > +#include "hw/mips/mips.h" > > +#include "sysemu/kvm_int.h" > > + > > +int mips_kvm_type(MachineState *machine, const char *vm_type) > > +{ > > + int r; > > + KVMState *s = KVM_STATE(machine->accelerator); > > + > > + r = kvm_check_extension(s, KVM_CAP_MIPS_VZ); > > + if (r > 0) { > > + return KVM_VM_MIPS_VZ; > > + } > > + > > + r = kvm_check_extension(s, KVM_CAP_MIPS_TE); > > + if (r > 0) { > > + return KVM_VM_MIPS_TE; > > + } > > + > > + return -1; > > +} > > diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h > > index 0af4c3d..2ac0580 100644 > > --- a/include/hw/mips/mips.h > > +++ b/include/hw/mips/mips.h > > @@ -20,4 +20,7 @@ void rc4030_dma_write(void *dma, uint8_t *buf, int len); > > > > DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dma_mr); > > > > +/* common.c */ > > +int mips_kvm_type(MachineState *machine, const char *vm_type); > > + > > #endif > > -- > > 2.7.0 > > > >