From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30176CA9EA9 for ; Fri, 18 Oct 2019 14:36:21 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id B870E2064B for ; Fri, 18 Oct 2019 14:36:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Fjav3PgA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B870E2064B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D76C01C0BD; Fri, 18 Oct 2019 16:36:19 +0200 (CEST) Received: from mail-il1-f195.google.com (mail-il1-f195.google.com [209.85.166.195]) by dpdk.org (Postfix) with ESMTP id 7B4011C0B1 for ; Fri, 18 Oct 2019 16:36:18 +0200 (CEST) Received: by mail-il1-f195.google.com with SMTP id c12so5762233ilm.1 for ; Fri, 18 Oct 2019 07:36:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=JCGmJhKKTHoqgwSQQhHHjixmREZdnWP2ZNdxlEcImGs=; b=Fjav3PgAugwa8Dj+DwKAbxCxDEbbgzqp6tbuz+rPPq3+piOAD6SUmBvja+iLTwmzUe 5bUu9CnozLTXJzy8Z/peYTQ/MPLmAVofXSZO1CQyR5OL9RedEeL9714B7oXyJKVv0gq6 g4pbxRyZsAqnI3+9tf4hAtJ2J2vinqdTSqyaZoU4pZozpM5AC3/tPnzzAXZtllIXqkwN B38sgcKsDcT4X7M3f4TSlRqTGhZzBxHeqhwavcIy6npRDxqmB5pXHs5IQqklvBuxYNK2 QP6K4eS+rNdIf/+F9fRL/x62rTQf8TupGyH6geBKEYXAbcj5CGWc6KQ/M/zzzcbW/kdH EsqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=JCGmJhKKTHoqgwSQQhHHjixmREZdnWP2ZNdxlEcImGs=; b=J60K3rLTSVJsLHZoOp6Ai8KrqRtIniF9wjVtB3+tz5M/zV2hYIYGo3I6uv1qqQxbfh Qazp8Qwzq3gU04l/h4SaWU8RFxdcbrvO09PvU5BJN95yEsT9z8/tCQN/C2JH1prgpSjX KbNv+kWrBKjSLNOXyrddPkKQ2w+LU9hK8W14fB8ZGt/Dba1yRhkaeUAWRP2utwXUXdvJ l2NXgYlb7rLTUZySfk3PzTdC5GneBXS0+XIxmhiTAP/jzQUugWYxZbzGxAlc08VuGXgd jo7wL9RtaP++SS6Ue1TbxLIc0RcrLH40pykP8hLEEvLnGGKuohP5PQdpCiQ3XckeyJzE 2mFA== X-Gm-Message-State: APjAAAWN10gO70qF8JZxKe4+YYX8lxOhZPom+/8dwgkTORkteKIwHUBd SBq2EMo0nnUSw+Tw6WAoMUbWG+oJLH3+67VU6jY= X-Google-Smtp-Source: APXvYqxHGBV4kRhSX2cTBkMyqZX3TgY+tIGX4OYl/25zdLVxg13U+ntvddnEnzfB17X3WteZMkfh6ehh2xWUpzydBd8= X-Received: by 2002:a92:918b:: with SMTP id e11mr11010626ill.130.1571409377636; Fri, 18 Oct 2019 07:36:17 -0700 (PDT) MIME-Version: 1.0 References: <1571139508-21701-1-git-send-email-phil.yang@arm.com> <1571397690-14116-1-git-send-email-phil.yang@arm.com> In-Reply-To: From: Jerin Jacob Date: Fri, 18 Oct 2019 20:06:06 +0530 Message-ID: To: David Marchand Cc: Jerin Jacob Kollanukkaran , Phil Yang , Gage Eads , dev , Thomas Monjalon , Hemant Agrawal , Honnappa Nagarahalli , Gavin Hu , nd , Bruce Richardson Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v11 1/3] eal/arm64: add 128-bit atomic compare exchange X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Oct 18, 2019 at 8:04 PM David Marchand wrote: > > On Fri, Oct 18, 2019 at 4:25 PM Jerin Jacob wrote: > > > > On Fri, Oct 18, 2019 at 7:46 PM David Marchand > > wrote: > > > > > > On Fri, Oct 18, 2019 at 1:22 PM Phil Yang wrote: > > > > > > > > This patch adds the implementation of the 128-bit atomic compare > > > > exchange API on AArch64. Using 64-bit 'ldxp/stxp' instructions > > > > can perform this operation. Moreover, on the LSE atomic extension > > > > accelerated platforms, it implemented by 'casp' instructions for > > > > better performance. > > > > > > > > Since the '__ARM_FEATURE_ATOMICS' flag only supports GCC-9, so this > > > > patch adds a new config flag 'RTE_ARM_FEATURE_ATOMICS' to enable the > > > > 'cas' version on elder version compilers. > > > > > > Jerin, Phil, > > > > > > I am getting a build error on the octeontx2 target: > > > > > > {standard input}: Assembler messages: > > > {standard input}:672: Error: selected processor does not support `casp > > > x0,x1,x2,x3,[x4]' > > > {standard input}:690: Error: selected processor does not support > > > `caspa x0,x1,x2,x3,[x4]' > > > {standard input}:708: Error: selected processor does not support > > > `caspl x0,x1,x2,x3,[x4]' > > > {standard input}:726: Error: selected processor does not support > > > `caspal x0,x1,x2,x3,[x4]' > > > ninja: build stopped: subcommand failed. > > > > > > Looking into the meson logs, I can see: > > > > > > Native C compiler: ccache gcc (gcc 9.2.1 "gcc (GCC) 9.2.1 20190827 > > > (Red Hat 9.2.1-1)") > > > Cross C compiler: aarch64-linux-gnu-gcc (gcc 8.2.1) > > > Host machine cpu family: aarch64 > > > Host machine cpu: armv8-a > > > Target machine cpu family: aarch64 > > > Target machine cpu: armv8-a > > > Build machine cpu family: x86_64 > > > Build machine cpu: x86_64 > > > ... > > > Message: Implementer : Cavium > > > Compiler for C supports arguments -mcpu=octeontx2: NO > > > > The compiler needs either +lse or mcpu=octeontx2 to generate casp instruction. > > Could you try this patch, I can submit a patch if it works for you. > > Ah cool, I was looking at the march stuff. > Tried your patch, it works fine. > > I'd say we can squash your bits in the current patch, since this was > unneeded before this patch. > Is this okay for you? Yup. > > > > > > [master][dpdk-next-net-mrvl] $ git diff > > diff --git a/config/arm/meson.build b/config/arm/meson.build > > index 979018e16..466522786 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -96,7 +96,7 @@ machine_args_cavium = [ > > ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], > > ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], > > ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], > > flags_thunderx2_extra], > > - ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] > > + ['0xb2', > > ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], > > flags_octeontx2_extra]] > > > > ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) > > impl_generic = ['Generic armv8', flags_generic, machine_args_generic] > > Thanks for the quick reply. > > > -- > David Marchand >