From: luto@amacapital.net (Andy Lutomirski)
Subject: [PATCH v2 2/2] nvme: Enable autonomous power state transitions
Date: Thu, 19 Jan 2017 21:17:09 -0800 [thread overview]
Message-ID: <CALCETrUaHmvrSrDHL5ysri+dXZq8iqGWzJdusVxPMxdsuieZhQ@mail.gmail.com> (raw)
In-Reply-To: <20170119201530.GA31954@localhost.localdomain>
On Thu, Jan 19, 2017@12:15 PM, Keith Busch <keith.busch@intel.com> wrote:
> On Thu, Jan 19, 2017@11:55:44AM -0800, Andy Lutomirski wrote:
>> +static void nvme_set_latency_tolerance(struct device *dev, s32 val)
>> +{
>> + struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
>> +
>> + u64 latency;
>> +
>> + if (val == PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT ||
>> + val == PM_QOS_LATENCY_ANY)
>> + latency = U64_MAX;
>> + else
>> + latency = val;
>> +
>> + if (ctrl->ps_max_latency_us != val) {
>> + ctrl->ps_max_latency_us = val;
>
> Did you mean to use 'latency' here instead of 'val'? Otherwise, I don't
> see why the latency variable exists.
D'oh! I'm a bit surprised the compiler didn't warn.
As a practical matter, this probably had no effect in my testing
because the two magic values would have ended up being rather large
s32 values, so the effect would be the same. v3 coming, though.
next prev parent reply other threads:[~2017-01-20 5:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-19 19:55 [PATCH v2 0/2] nvme: APST support Andy Lutomirski
2017-01-19 19:55 ` [PATCH v2 1/2] nvme: Add a quirk mechanism that uses identify_ctrl Andy Lutomirski
2017-01-20 10:24 ` Christoph Hellwig
2017-01-19 19:55 ` [PATCH v2 2/2] nvme: Enable autonomous power state transitions Andy Lutomirski
2017-01-19 20:15 ` Keith Busch
2017-01-20 5:17 ` Andy Lutomirski [this message]
2017-01-20 10:30 ` Christoph Hellwig
2017-01-20 18:07 ` Andy Lutomirski
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