From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66787C433F5 for ; Sun, 10 Oct 2021 15:17:59 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 813FB60F38 for ; Sun, 10 Oct 2021 15:17:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 813FB60F38 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=timesys.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1E3FC8369F; Sun, 10 Oct 2021 17:17:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=timesys.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=timesys-com.20210112.gappssmtp.com header.i=@timesys-com.20210112.gappssmtp.com header.b="uB/dROaR"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 55B158369F; Sun, 10 Oct 2021 17:17:53 +0200 (CEST) Received: from mail-io1-xd31.google.com (mail-io1-xd31.google.com [IPv6:2607:f8b0:4864:20::d31]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 677BA82E48 for ; Sun, 10 Oct 2021 17:17:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=timesys.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=angelo.dureghello@timesys.com Received: by mail-io1-xd31.google.com with SMTP id n7so7945104iod.0 for ; Sun, 10 Oct 2021 08:17:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=timesys-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=vgRd2YGu8B+Xgfdi4JWvqQsUqH9HUUgHMoa2o8hN/T4=; b=uB/dROaRfsKJ2rUauqTpYnu0WGsuCdL1svnu3ibWcQlDF4UKHwwLnD0VUMFsUl85iz wNLzlUWA3WgUkBRV3FKS7t1bZC1BPnFt222o9OWTRgSM19n9RX7Ag7jxVIpz9j1oGmFD QfskNKYKPdiiPCQBrguYAeoYV6wut23SIEcaBkJS8ifNDZOSo/+SOs7ms7fiEcMlnXU8 Bzhg0kcRKE2I+JYzZXh7tiYcTt8pSxQFyX8omH+ONqqlRRT4YoC8qJmD3a/eSY/UwgrF Sk7pMlBYAZzw4DpkLhLkTozNo6VuTYZj4RxfUUWM0FlIgdWLRcEYHsRcGdes+8NQjHau +QxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=vgRd2YGu8B+Xgfdi4JWvqQsUqH9HUUgHMoa2o8hN/T4=; b=BWNA1I+57iXw3Qel18XfCu4fWyzXlUj9InaV880L/6wOpuT2d1/hi0d89trb0e4UVt LrjyK889w5uHoILcFb2TrSLOyI77G0JfniH0YcYXxUpF2VX0syffhkAdcj8RbZM8NIrd Au+nZcGu2N5FVRKkgYxjrIY2d/O9rxFyy+RHh4pXXRnB9mwp6zJ5u3OlOWWviVCCW69h ic531Pp0q6FR9z73N1gkoKF/3oRAwuLJob/B6mhFY3fzUDeP19Hnqas1hKcFwoLrmSnD EdNXuMmYtmmKD1+HZKk468i14VWpNl2L1Dk3H1Iv/ds7H52O9WwhBfgWXe5I5TUyyfz/ ZLBg== X-Gm-Message-State: AOAM531L1FcDJFEiT7b4nh/L2xvAYUtrVZ1wcqOoVD5i7NG9JtpDP+tB IdQGTmLmFQjs44LWecXvCHTRc9fyUklpQQoaOnFWKCRlg6JOjg== X-Google-Smtp-Source: ABdhPJy588QRmo+VLEs8DLBPe99dtRoys7Vdbn4kAC49DGs50VA8LfVt2LxcZiffKWn1AsTZ3I0ZglyvLHTfI0NwkIQ= X-Received: by 2002:a05:6602:2d86:: with SMTP id k6mr11900788iow.130.1633879065888; Sun, 10 Oct 2021 08:17:45 -0700 (PDT) MIME-Version: 1.0 References: <20211009121859.1384658-1-angelo.dureghello@timesys.com> <20211010004553.37daf2ca@slackpad.fritz.box> In-Reply-To: <20211010004553.37daf2ca@slackpad.fritz.box> From: Angelo Dureghello Date: Sun, 10 Oct 2021 17:14:57 +0200 Message-ID: Subject: Re: [PATCH 1/2] sunxi: add H2+ config option To: Andre Przywara Cc: Jagan Teki , Tom Rini , U-Boot-Denx Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Hi Andre, On Sun, Oct 10, 2021 at 1:48 AM Andre Przywara wrote: > > On Sat, 9 Oct 2021 14:18:58 +0200 > Angelo Dureghello wrote: > > Hi Angelo, > > > Add H2+ Kconfig oiption to display proper cpu at boot time, > > and for other future uses, if needed, to differentiate against H3. > > > > The patch does not change any board defconfig at this stage, > > so that nothing is broken. > > > > Tested this CONFIG_MACH_SUN8I_H2_PLUS to work properly on > > banana pi m2 zero. > > But why? What does that fix except the hardcoded CPU output line? I > only see a lot of churn and future issues (forgetting to add > MACH_SUN8I_H2_PLUS). As far as we know the two SoCs are very close, and > are almost indistinguishable by software, that's why we treat them the > same. > So is there a good reason for differentiating the two? > If you are *really* desperate about that one "CPU: ..." line, have a > look at https://linux-sunxi.org/H3#Variants and see if you can make this > decision at runtime, check A31 and A31s for an example. This "desperate" sounds a bit ugly :) I can live without of course :) . I faced the uart2 console not working issue (fixed in 2/2), and initially thought it was a H2+ / H3 difference, but it was not. Anyway, i finally thought that a differentiation may be useful If not, just trow the patch in the bin. In the case you may still be interested differentiating the two just to print cpu model, or any future need, an alternative safer proposal may be something like: config MACH_SUN8I_H2_PLUS select MACH_SUN8I_H3 > > Cheers, > Andre > cheers, angelo > > Signed-off-by: Angelo Dureghello > > --- > > arch/arm/cpu/armv7/sunxi/Makefile | 1 + > > arch/arm/cpu/armv7/sunxi/psci.c | 2 ++ > > arch/arm/cpu/armv7/sunxi/tzpc.c | 2 +- > > arch/arm/dts/Makefile | 5 +++++ > > arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++-- > > arch/arm/mach-sunxi/Kconfig | 9 +++++++++ > > arch/arm/mach-sunxi/board.c | 3 ++- > > arch/arm/mach-sunxi/cpu_info.c | 6 ++++-- > > arch/arm/mach-sunxi/dram_sunxi_dw.c | 4 ++-- > > drivers/clk/sunxi/Makefile | 1 + > > drivers/video/sunxi/sunxi_de2.c | 2 +- > > 11 files changed, 30 insertions(+), 9 deletions(-) > > > > diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile > > index 1d40d6a18d..5fdfe45401 100644 > > --- a/arch/arm/cpu/armv7/sunxi/Makefile > > +++ b/arch/arm/cpu/armv7/sunxi/Makefile > > @@ -8,6 +8,7 @@ > > obj-y += timer.o > > > > obj-$(CONFIG_MACH_SUN6I) += tzpc.o > > +obj-$(CONFIG_MACH_SUN8I_H2_PLUS) += tzpc.o > > obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o > > > > ifndef CONFIG_SPL_BUILD > > diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c > > index 1ac50f558a..bcdbe888bc 100644 > > --- a/arch/arm/cpu/armv7/sunxi/psci.c > > +++ b/arch/arm/cpu/armv7/sunxi/psci.c > > @@ -79,6 +79,7 @@ static void __secure __mdelay(u32 ms) > > static void __secure clamp_release(u32 __maybe_unused *clamp) > > { > > #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ > > + defined(CONFIG_MACH_SUN8I_H2_PLUS) || \ > > defined(CONFIG_MACH_SUN8I_H3) || \ > > defined(CONFIG_MACH_SUN8I_R40) > > u32 tmp = 0x1ff; > > @@ -94,6 +95,7 @@ static void __secure clamp_release(u32 __maybe_unused *clamp) > > static void __secure clamp_set(u32 __maybe_unused *clamp) > > { > > #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ > > + defined(CONFIG_MACH_SUN8I_H2_PLUS) || \ > > defined(CONFIG_MACH_SUN8I_H3) || \ > > defined(CONFIG_MACH_SUN8I_R40) > > writel(0xff, clamp); > > diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c > > index 0c86a21a3f..44640509ff 100644 > > --- a/arch/arm/cpu/armv7/sunxi/tzpc.c > > +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c > > @@ -17,7 +17,7 @@ void tzpc_init(void) > > writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set); > > #endif > > > > -#ifdef CONFIG_MACH_SUN8I_H3 > > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > /* Enable non-secure access to all peripherals */ > > writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set); > > writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set); > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > > index b8a382d153..2e58815769 100644 > > --- a/arch/arm/dts/Makefile > > +++ b/arch/arm/dts/Makefile > > @@ -598,6 +598,11 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ > > sun8i-a83t-bananapi-m3.dtb \ > > sun8i-a83t-cubietruck-plus.dtb \ > > sun8i-a83t-tbs-a711.dtb > > +dtb-$(CONFIG_MACH_SUN8I_H2_PLUS) += \ > > + sun8i-h2-plus-bananapi-m2-zero.dtb \ > > + sun8i-h2-plus-libretech-all-h3-cc.dtb \ > > + sun8i-h2-plus-orangepi-r1.dtb \ > > + sun8i-h2-plus-orangepi-zero.dtb > > dtb-$(CONFIG_MACH_SUN8I_H3) += \ > > sun8i-h2-plus-bananapi-m2-zero.dtb \ > > sun8i-h2-plus-libretech-all-h3-cc.dtb \ > > diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h > > index d4c795d89c..b7a66b91e7 100644 > > --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h > > +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h > > @@ -15,7 +15,7 @@ > > !defined(CONFIG_MACH_SUN8I_R40) && \ > > !defined(CONFIG_MACH_SUN8I_V3S) > > #define SUNXI_SRAM_A2_BASE 0x00040000 > > -#ifdef CONFIG_MACH_SUN8I_H3 > > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > #define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */ > > #else > > #define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */ > > @@ -174,7 +174,7 @@ defined(CONFIG_MACH_SUN50I) > > /* module sram */ > > #define SUNXI_SRAM_C_BASE 0x01d00000 > > > > -#ifndef CONFIG_MACH_SUN8I_H3 > > +#if !defined(CONFIG_MACH_SUN8I_H2_PLUS) && !defined(CONFIG_MACH_SUN8I_H3) > > #define SUNXI_DE_FE0_BASE 0x01e00000 > > #else > > #define SUNXI_TVE0_BASE 0x01e00000 > > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig > > index 1d4a4fdd0c..eae8a0e68b 100644 > > --- a/arch/arm/mach-sunxi/Kconfig > > +++ b/arch/arm/mach-sunxi/Kconfig > > @@ -288,6 +288,15 @@ config MACH_SUN8I_A83T > > select MMC_SUNXI_HAS_MODE_SWITCH > > select SUPPORT_SPL > > > > +config MACH_SUN8I_H2_PLUS > > + bool "sun8i (Allwinner H2+)" > > + select CPU_V7A > > + select CPU_V7_HAS_NONSEC > > + select CPU_V7_HAS_VIRT > > + select ARCH_SUPPORT_PSCI > > + select MACH_SUNXI_H3_H5 > > + select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT > > + > > config MACH_SUN8I_H3 > > bool "sun8i (Allwinner H3)" > > select CPU_V7A > > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > > index d9b04f75fc..adb63e93e7 100644 > > --- a/arch/arm/mach-sunxi/board.c > > +++ b/arch/arm/mach-sunxi/board.c > > @@ -228,7 +228,8 @@ void s_init(void) > > "mcr p15, 0, r0, c1, c0, 1\n" > > ::: "r0"); > > #endif > > -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 > > +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H2_PLUS || \ > > + defined CONFIG_MACH_SUN8I_H3 > > /* Enable non-secure access to some peripherals */ > > tzpc_init(); > > #endif > > diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c > > index ba33ef2430..429e5ce283 100644 > > --- a/arch/arm/mach-sunxi/cpu_info.c > > +++ b/arch/arm/mach-sunxi/cpu_info.c > > @@ -85,6 +85,8 @@ int print_cpuinfo(void) > > printf("CPU: Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id()); > > #elif defined CONFIG_MACH_SUN8I_A83T > > printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id()); > > +#elif defined CONFIG_MACH_SUN8I_H2_PLUS > > + printf("CPU: Allwinner H2+ (SUN8I %04x)\n", sunxi_get_sram_id()); > > #elif defined CONFIG_MACH_SUN8I_H3 > > printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id()); > > #elif defined CONFIG_MACH_SUN8I_R40 > > @@ -109,7 +111,7 @@ int print_cpuinfo(void) > > } > > #endif > > > > -#ifdef CONFIG_MACH_SUN8I_H3 > > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > > > #define SIDC_PRCTL 0x40 > > #define SIDC_RDKEY 0x60 > > @@ -143,7 +145,7 @@ int sunxi_get_sid(unsigned int *sid) > > { > > #ifdef CONFIG_AXP221_POWER > > return axp_get_sid(sid); > > -#elif defined CONFIG_MACH_SUN8I_H3 > > +#elif defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > /* > > * H3 SID controller has a bug, which makes the initial value of > > * SUNXI_SID_BASE at boot wrong. > > diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c > > index 9107b114df..f28c23d0c6 100644 > > --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c > > +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c > > @@ -863,7 +863,7 @@ unsigned long sunxi_dram_init(void) > > } > > }, > > > > -#if defined(CONFIG_MACH_SUN8I_H3) > > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, > > .dx_write_delays = SUN8I_H3_DX_WRITE_DELAYS, > > .ac_delays = SUN8I_H3_AC_DELAYS, > > @@ -890,7 +890,7 @@ unsigned long sunxi_dram_init(void) > > * the static functions. This saves us #ifdefs, but still keeps the binary > > * small. > > */ > > -#if defined(CONFIG_MACH_SUN8I_H3) > > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > uint16_t socid = SOCID_H3; > > #elif defined(CONFIG_MACH_SUN8I_R40) > > uint16_t socid = SOCID_R40; > > diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile > > index 4f9282a8b9..d8565b3946 100644 > > --- a/drivers/clk/sunxi/Makefile > > +++ b/drivers/clk/sunxi/Makefile > > @@ -16,6 +16,7 @@ obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o > > obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o > > obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o > > obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o > > +obj-$(CONFIG_CLK_SUN8I_H2_PLUS) += clk_h3.o > > obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o > > obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o > > obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o > > diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c > > index e02d359cd2..2af2ae4cac 100644 > > --- a/drivers/video/sunxi/sunxi_de2.c > > +++ b/drivers/video/sunxi/sunxi_de2.c > > @@ -84,7 +84,7 @@ static void sunxi_de2_mode_set(int mux, const struct display_timing *mode, > > u32 format; > > > > /* enable clock */ > > -#ifdef CONFIG_MACH_SUN8I_H3 > > +#if defined(CONFIG_MACH_SUN8I_H2_PLUS) || defined(CONFIG_MACH_SUN8I_H3) > > setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 4); > > #else > > setbits_le32(&de_clk_regs->rst_cfg, BIT(mux)); > -- Angelo Dureghello Timesys e. angelo.dureghello@timesys.com