From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37347C433DF for ; Thu, 4 Jun 2020 16:28:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01DA6207D8 for ; Thu, 4 Jun 2020 16:28:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="lsX7SRkn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729582AbgFDQ2A (ORCPT ); Thu, 4 Jun 2020 12:28:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729115AbgFDQ17 (ORCPT ); Thu, 4 Jun 2020 12:27:59 -0400 Received: from mail-il1-x144.google.com (mail-il1-x144.google.com [IPv6:2607:f8b0:4864:20::144]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9FEAC08C5C0 for ; Thu, 4 Jun 2020 09:27:58 -0700 (PDT) Received: by mail-il1-x144.google.com with SMTP id d1so6651475ila.8 for ; Thu, 04 Jun 2020 09:27:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=8SV0FtrMHcEVC0TjG1lIBMyklx/s99kl7ywIO23ZhMk=; b=lsX7SRkn/58kMRS+GxvZjQ1F2T1zTLqcNYPLPjzqxYcEq3/rdEQ1PDHoI8s25jhaKF i6R2yAAOM4ruXYCc74CjQSulrfgjKrectwnu2jZntPzkfezzeKYUXNmzBYFlNoYPJKwj gANWWpzAxKwCkGb1wv4cfPVDP6Dg7hdTuWP/3IrvKe2jBG0seplny638FN3YJS/bmPCC qwnqfF76UvF1EOL5CB+Wn0DdaINU1//sA2M56c0PBNB4tw/YvnxLZkMr49qB4vmDWcDg R6PC7XpwseUn/XvM2PVM/RaMI0o561hsiNr1xDau9y5opoF0pHprCUUfhJ5diEZM5M/5 yABA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=8SV0FtrMHcEVC0TjG1lIBMyklx/s99kl7ywIO23ZhMk=; b=AkBwbxsfI3tnLmghnqnb/RIu6Hkguzhnq3ZEtqfhQ7/tUV8PLZzEVqnp3LhyyNsqVL kPhJ6/nFpFOfGe9ItQj4TdL66t6/ixly0jdOvF6rDmyVXEGfocbV+tj3R5k61xyuf5d9 yeVe4RRSvkzXvQWE/fcoIecG2GoF08xEJchhVrJuqFLnO9FoMHPJW9i6DoTbAllwPiwm KVBGV5NrfTI6YAwGdxiVkK9S2Nfa+x1JxP3Xf+4E0Sf0omYsLQBKRJ1trl1dUJDMxdL8 a9Gl5a5Y/fvNxoFOv9NsiMfCg6j1qnpCvbC+eu3UsMuHRNHk3zhPFrlkLm9i76ylpL6D KFYA== X-Gm-Message-State: AOAM530vO7puulB4cyqDnqmHgl9qCcinY6qsj9/FTzFdMVM2L+o0sfO+ AA3qFb29PiskeJBeStUi75bUJgkmhlM6Y9sCYMJRcIT1 X-Google-Smtp-Source: ABdhPJxRbVJTskYAsmdKpu2pg4TINE2MruufkpwnEijmewcp0JnBYFK2jNyYBde6mk7i4x2dEuDjCSNqEH6iENKh6dA= X-Received: by 2002:a92:5f13:: with SMTP id t19mr4759363ilb.296.1591288077708; Thu, 04 Jun 2020 09:27:57 -0700 (PDT) MIME-Version: 1.0 References: <48454efb-455f-5505-f92c-7f78836d5b91@redhat.com> In-Reply-To: <48454efb-455f-5505-f92c-7f78836d5b91@redhat.com> From: Jim Mattson Date: Thu, 4 Jun 2020 09:27:46 -0700 Message-ID: Subject: Re: PAE mode save/restore broken To: Paolo Bonzini Cc: kvm list , Sean Christopherson Content-Type: text/plain; charset="UTF-8" Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, Jun 4, 2020 at 7:51 AM Paolo Bonzini wrote: > > On 02/06/20 02:11, Jim Mattson wrote: > > I can only assume that no one cares that KVM_GET_SREGS/KVM_SET_SREGS > > is broken for PAE mode guests (i.e. KVM_GET_SREGS doesn't capture the > > PDPTRs and KVM_SET_SREGS re-reads them from memory). > > > > Presumably, since AMD's nested paging is broken for PAE mode guests, > > the kvm community has made the decision not to get things right for > > Intel either. Can anyone confirm? This was all before my time. > > Yes, pretty much. The PDPTRs are not part of the saved state, we just > treat them as a small third level in the radix tree. Of course, for > nested VMX they are properly synced to the VMCS12 and serialized by > KVM_SET_NESTED_STATE. > > Out of curiosity are there OSes that rely on the PDPTRs remaining cached > until the next CR3 load? None that I know of. It's interesting that Intel has taken great pains to virtualize the architected behavior, but AMD just shrugged it off.