From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85C11FC6194 for ; Wed, 6 Nov 2019 23:33:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 565C8217F5 for ; Wed, 6 Nov 2019 23:33:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573083201; bh=kXuPSKl+d3N16AWU48reQZ1zuDSoKWcH8SnXbdsyG1Y=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=BAAwMyGTgDkwqgVw5WsS7EfI8QGkTc1ziQWvfk7w6SH76FLae6M93KTxJucyi5KYp MLNsdF5Tn1arCqEveJyE9Ee6L4UNke7E2yuvDgAhluYfT6JScJ1OzjX9lO5WFA1ruc SK+zXmPUb3VwNRnNxnorNTDWANcQb7Z30BQOID3Y= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732806AbfKFXdU (ORCPT ); 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Wed, 06 Nov 2019 15:33:17 -0800 (PST) MIME-Version: 1.0 References: <20191031123040.26316-1-benjamin.gaignard@st.com> <20191031123040.26316-5-benjamin.gaignard@st.com> <20191106041518.GC5294@bogus> <41c43d09-9371-8b23-a3dd-e43f5df5c5bc@st.com> In-Reply-To: <41c43d09-9371-8b23-a3dd-e43f5df5c5bc@st.com> From: Rob Herring Date: Wed, 6 Nov 2019 17:33:05 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 4/4] dt-bindings: mfd: Convert stm32 timers bindings to json-schema To: Benjamin GAIGNARD Cc: "mark.rutland@arm.com" , Alexandre TORGUE , Fabrice GASNIER , "jic23@kernel.org" , "knaack.h@gmx.de" , "lars@metafoo.de" , "pmeerw@pmeerw.net" , "lee.jones@linaro.org" , "thierry.reding@gmail.com" , "u.kleine-koenig@pengutronix.de" , "devicetree@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-iio@vger.kernel.org" , "linux-pwm@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 6, 2019 at 1:57 PM Benjamin GAIGNARD wrote: > > > On 11/6/19 5:15 AM, Rob Herring wrote: > > On Thu, Oct 31, 2019 at 01:30:40PM +0100, Benjamin Gaignard wrote: > >> Convert the STM32 timers binding to DT schema format using json-schema > >> > >> Signed-off-by: Benjamin Gaignard > >> --- > >> .../devicetree/bindings/mfd/st,stm32-timers.yaml | 91 ++++++++++++++++++++++ > >> .../devicetree/bindings/mfd/stm32-timers.txt | 73 ----------------- > >> 2 files changed, 91 insertions(+), 73 deletions(-) > >> create mode 100644 Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> delete mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt > >> > >> diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> new file mode 100644 > >> index 000000000000..3f0a65fb2bc0 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> @@ -0,0 +1,91 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: STMicroelectronics STM32 Timers bindings > >> + > >> +description: | > >> + This hardware block provides 3 types of timer along with PWM functionality: \ > > Don't need the \ > ok > > > >> + - advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable \ > >> + prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. \ > >> + - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a \ > >> + programmable prescaler and PWM outputs.\ > >> + - basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. > >> + > >> +maintainers: > >> + - Benjamin Gaignard > >> + - Fabrice Gasnier > >> + > >> +allOf: > >> + - $ref: "../pwm/st,stm32-pwm.yaml#" > >> + - $ref: "../iio/timer/st,stm32-timer-trigger.yaml#" > >> + - $ref: "../counter/st,stm32-timer-cnt.yaml#" > > This works, but I prefer the child node names be listed under properties > > here with a ref: > > > > counter: > > $ref: "../counter/st,stm32-timer-cnt.yaml#" > If I wrote everything in one file I guess what won't be needed anymore > > > >> + > >> +properties: > >> + compatible: > >> + const: st,stm32-timers > >> + > >> + reg: > >> + maxItems: 1 > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + clock-names: > >> + items: > >> + - const: int > >> + > >> + reset: > >> + maxItems: 1 > >> + > >> + dmas: true > > How many? > > from 0 up to 8, but I don't know the syntax for that. minItems = 0 isn't > accepted. > > Any hints for me ? 0 is not accepted because the property is never 0 items. 0 is not present. So just: minItems: 1 maxItems: 8 > >> + > >> + dma-names: true > > What are the names? > > it could be ch1 ... ch8, "trig" or "up" in any order. Why does it need to be in any order? Normally we don't want to have that. > > Again I haven't be able to find a syntax that allow to list the names > and use them in any orders. dma-names: items: enum: [ ch1, ch2, ..., trig, up ] Rob From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 4/4] dt-bindings: mfd: Convert stm32 timers bindings to json-schema Date: Wed, 6 Nov 2019 17:33:05 -0600 Message-ID: References: <20191031123040.26316-1-benjamin.gaignard@st.com> <20191031123040.26316-5-benjamin.gaignard@st.com> <20191106041518.GC5294@bogus> <41c43d09-9371-8b23-a3dd-e43f5df5c5bc@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <41c43d09-9371-8b23-a3dd-e43f5df5c5bc@st.com> Sender: linux-kernel-owner@vger.kernel.org To: Benjamin GAIGNARD Cc: "mark.rutland@arm.com" , Alexandre TORGUE , Fabrice GASNIER , "jic23@kernel.org" , "knaack.h@gmx.de" , "lars@metafoo.de" , "pmeerw@pmeerw.net" , "lee.jones@linaro.org" , "thierry.reding@gmail.com" , "u.kleine-koenig@pengutronix.de" , "devicetree@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , linux-iio@vger.kernel List-Id: linux-pwm@vger.kernel.org On Wed, Nov 6, 2019 at 1:57 PM Benjamin GAIGNARD wrote: > > > On 11/6/19 5:15 AM, Rob Herring wrote: > > On Thu, Oct 31, 2019 at 01:30:40PM +0100, Benjamin Gaignard wrote: > >> Convert the STM32 timers binding to DT schema format using json-schema > >> > >> Signed-off-by: Benjamin Gaignard > >> --- > >> .../devicetree/bindings/mfd/st,stm32-timers.yaml | 91 ++++++++++++++++++++++ > >> .../devicetree/bindings/mfd/stm32-timers.txt | 73 ----------------- > >> 2 files changed, 91 insertions(+), 73 deletions(-) > >> create mode 100644 Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> delete mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt > >> > >> diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> new file mode 100644 > >> index 000000000000..3f0a65fb2bc0 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> @@ -0,0 +1,91 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: STMicroelectronics STM32 Timers bindings > >> + > >> +description: | > >> + This hardware block provides 3 types of timer along with PWM functionality: \ > > Don't need the \ > ok > > > >> + - advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable \ > >> + prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. \ > >> + - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a \ > >> + programmable prescaler and PWM outputs.\ > >> + - basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. > >> + > >> +maintainers: > >> + - Benjamin Gaignard > >> + - Fabrice Gasnier > >> + > >> +allOf: > >> + - $ref: "../pwm/st,stm32-pwm.yaml#" > >> + - $ref: "../iio/timer/st,stm32-timer-trigger.yaml#" > >> + - $ref: "../counter/st,stm32-timer-cnt.yaml#" > > This works, but I prefer the child node names be listed under properties > > here with a ref: > > > > counter: > > $ref: "../counter/st,stm32-timer-cnt.yaml#" > If I wrote everything in one file I guess what won't be needed anymore > > > >> + > >> +properties: > >> + compatible: > >> + const: st,stm32-timers > >> + > >> + reg: > >> + maxItems: 1 > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + clock-names: > >> + items: > >> + - const: int > >> + > >> + reset: > >> + maxItems: 1 > >> + > >> + dmas: true > > How many? > > from 0 up to 8, but I don't know the syntax for that. minItems = 0 isn't > accepted. > > Any hints for me ? 0 is not accepted because the property is never 0 items. 0 is not present. So just: minItems: 1 maxItems: 8 > >> + > >> + dma-names: true > > What are the names? > > it could be ch1 ... ch8, "trig" or "up" in any order. Why does it need to be in any order? Normally we don't want to have that. > > Again I haven't be able to find a syntax that allow to list the names > and use them in any orders. dma-names: items: enum: [ ch1, ch2, ..., trig, up ] Rob From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD039FC6195 for ; Wed, 6 Nov 2019 23:33:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 513372075C for ; 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Wed, 6 Nov 2019 23:33:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573083198; bh=kXuPSKl+d3N16AWU48reQZ1zuDSoKWcH8SnXbdsyG1Y=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=jtHyhFkWE3pKHvdd83jG7hT7NyR376eTuEr9ERzYU/cLPUMq8jfmu4Pc3AwMwAOfA Ta5bhoJh9cqN3cZVa6vzhyOfspGH5C9cbvPH9vfe7rCAYdmt5ayL69+QublnfxuRyj LKVoZnM3aCaTH+YQzn0GMYdakODsvG+TlLgH+QUU= Received: by mail-qv1-f45.google.com with SMTP id x14so99649qvu.0 for ; Wed, 06 Nov 2019 15:33:18 -0800 (PST) X-Gm-Message-State: APjAAAWqKamt/uKvHnG4JHLaQcBjL59QcM/JyvrgIVcAS9wjhkHkQLOJ g+evXyB6iAuy1UiCzgoTSxKJq+o1W4UEjYatLg== X-Google-Smtp-Source: APXvYqyC3A2flD/nPROb9ThjRdJKDCsiLA48Ab5fS1yM/Zg798U/Sn7jNMdhWcJ4s8JZjQWG/fXn9qcpyqj9go+/rgA= X-Received: by 2002:a0c:ca06:: with SMTP id c6mr490409qvk.136.1573083197450; Wed, 06 Nov 2019 15:33:17 -0800 (PST) MIME-Version: 1.0 References: <20191031123040.26316-1-benjamin.gaignard@st.com> <20191031123040.26316-5-benjamin.gaignard@st.com> <20191106041518.GC5294@bogus> <41c43d09-9371-8b23-a3dd-e43f5df5c5bc@st.com> In-Reply-To: <41c43d09-9371-8b23-a3dd-e43f5df5c5bc@st.com> From: Rob Herring Date: Wed, 6 Nov 2019 17:33:05 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 4/4] dt-bindings: mfd: Convert stm32 timers bindings to json-schema To: Benjamin GAIGNARD X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191106_153319_642529_55DB29C4 X-CRM114-Status: GOOD ( 24.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "lars@metafoo.de" , Alexandre TORGUE , "linux-pwm@vger.kernel.org" , "linux-iio@vger.kernel.org" , "u.kleine-koenig@pengutronix.de" , "linux-kernel@vger.kernel.org" , "thierry.reding@gmail.com" , "linux-arm-kernel@lists.infradead.org" , "pmeerw@pmeerw.net" , "knaack.h@gmx.de" , Fabrice GASNIER , "lee.jones@linaro.org" , "linux-stm32@st-md-mailman.stormreply.com" , "jic23@kernel.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 6, 2019 at 1:57 PM Benjamin GAIGNARD wrote: > > > On 11/6/19 5:15 AM, Rob Herring wrote: > > On Thu, Oct 31, 2019 at 01:30:40PM +0100, Benjamin Gaignard wrote: > >> Convert the STM32 timers binding to DT schema format using json-schema > >> > >> Signed-off-by: Benjamin Gaignard > >> --- > >> .../devicetree/bindings/mfd/st,stm32-timers.yaml | 91 ++++++++++++++++++++++ > >> .../devicetree/bindings/mfd/stm32-timers.txt | 73 ----------------- > >> 2 files changed, 91 insertions(+), 73 deletions(-) > >> create mode 100644 Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> delete mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt > >> > >> diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> new file mode 100644 > >> index 000000000000..3f0a65fb2bc0 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > >> @@ -0,0 +1,91 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: STMicroelectronics STM32 Timers bindings > >> + > >> +description: | > >> + This hardware block provides 3 types of timer along with PWM functionality: \ > > Don't need the \ > ok > > > >> + - advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable \ > >> + prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. \ > >> + - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a \ > >> + programmable prescaler and PWM outputs.\ > >> + - basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. > >> + > >> +maintainers: > >> + - Benjamin Gaignard > >> + - Fabrice Gasnier > >> + > >> +allOf: > >> + - $ref: "../pwm/st,stm32-pwm.yaml#" > >> + - $ref: "../iio/timer/st,stm32-timer-trigger.yaml#" > >> + - $ref: "../counter/st,stm32-timer-cnt.yaml#" > > This works, but I prefer the child node names be listed under properties > > here with a ref: > > > > counter: > > $ref: "../counter/st,stm32-timer-cnt.yaml#" > If I wrote everything in one file I guess what won't be needed anymore > > > >> + > >> +properties: > >> + compatible: > >> + const: st,stm32-timers > >> + > >> + reg: > >> + maxItems: 1 > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + clock-names: > >> + items: > >> + - const: int > >> + > >> + reset: > >> + maxItems: 1 > >> + > >> + dmas: true > > How many? > > from 0 up to 8, but I don't know the syntax for that. minItems = 0 isn't > accepted. > > Any hints for me ? 0 is not accepted because the property is never 0 items. 0 is not present. So just: minItems: 1 maxItems: 8 > >> + > >> + dma-names: true > > What are the names? > > it could be ch1 ... ch8, "trig" or "up" in any order. Why does it need to be in any order? Normally we don't want to have that. > > Again I haven't be able to find a syntax that allow to list the names > and use them in any orders. dma-names: items: enum: [ ch1, ch2, ..., trig, up ] Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel