From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH] arm/arm64: DT: Fix GICv2 CPU interface size Date: Wed, 25 Jun 2014 07:21:17 -0500 Message-ID: References: <1403692675-26503-1-git-send-email-marc.zyngier@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <1403692675-26503-1-git-send-email-marc.zyngier@arm.com> Sender: linux-samsung-soc-owner@vger.kernel.org To: Marc Zyngier Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Ben Dooks , Kukjin Kim , =?UTF-8?Q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Maxime Ripard , Stephen Warren , Thierry Reding , Catalin Marinas , Will Deacon , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-samsung-soc@vger.kernel.org" linux List-Id: linux-tegra@vger.kernel.org On Wed, Jun 25, 2014 at 5:37 AM, Marc Zyngier wrote: > All the Cortex-{A7,A15} implementations are using a GICv2. Same for > the current arm64 platforms. > > Turns out that most of these platforms have described their GIC CPU > interface size as being 4kB. while it is actually 8kB (the GICC_DIR > register lives at offset 0x1000). > > This was found when converting the GIC driver to use EOImode==1 on > GICv2-based systems. It uses the GICC_DIR register, and the result > is a very early firework... What's your plan for making the kernel change? Updating the dts files is good, but that doesn't immediately help you if you have old dtbs. > Signed-off-by: Marc Zyngier > --- > arch/arm/boot/dts/axm55xx.dtsi | 2 +- > arch/arm/boot/dts/dra7.dtsi | 2 +- > arch/arm/boot/dts/ecx-2000.dts | 2 +- Acked-by: Rob Herring Rob From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756596AbaFYMVl (ORCPT ); Wed, 25 Jun 2014 08:21:41 -0400 Received: from mail-vc0-f176.google.com ([209.85.220.176]:48605 "EHLO mail-vc0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753872AbaFYMVj (ORCPT ); Wed, 25 Jun 2014 08:21:39 -0400 MIME-Version: 1.0 In-Reply-To: <1403692675-26503-1-git-send-email-marc.zyngier@arm.com> References: <1403692675-26503-1-git-send-email-marc.zyngier@arm.com> From: Rob Herring Date: Wed, 25 Jun 2014 07:21:17 -0500 Message-ID: Subject: Re: [PATCH] arm/arm64: DT: Fix GICv2 CPU interface size To: Marc Zyngier Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Ben Dooks , Kukjin Kim , =?UTF-8?Q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Maxime Ripard , Stephen Warren , Thierry Reding , Catalin Marinas , Will Deacon , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-samsung-soc@vger.kernel.org" , linux-omap , "linux-tegra@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 25, 2014 at 5:37 AM, Marc Zyngier wrote: > All the Cortex-{A7,A15} implementations are using a GICv2. Same for > the current arm64 platforms. > > Turns out that most of these platforms have described their GIC CPU > interface size as being 4kB. while it is actually 8kB (the GICC_DIR > register lives at offset 0x1000). > > This was found when converting the GIC driver to use EOImode==1 on > GICv2-based systems. It uses the GICC_DIR register, and the result > is a very early firework... What's your plan for making the kernel change? Updating the dts files is good, but that doesn't immediately help you if you have old dtbs. > Signed-off-by: Marc Zyngier > --- > arch/arm/boot/dts/axm55xx.dtsi | 2 +- > arch/arm/boot/dts/dra7.dtsi | 2 +- > arch/arm/boot/dts/ecx-2000.dts | 2 +- Acked-by: Rob Herring Rob From mboxrd@z Thu Jan 1 00:00:00 1970 From: robherring2@gmail.com (Rob Herring) Date: Wed, 25 Jun 2014 07:21:17 -0500 Subject: [PATCH] arm/arm64: DT: Fix GICv2 CPU interface size In-Reply-To: <1403692675-26503-1-git-send-email-marc.zyngier@arm.com> References: <1403692675-26503-1-git-send-email-marc.zyngier@arm.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Jun 25, 2014 at 5:37 AM, Marc Zyngier wrote: > All the Cortex-{A7,A15} implementations are using a GICv2. Same for > the current arm64 platforms. > > Turns out that most of these platforms have described their GIC CPU > interface size as being 4kB. while it is actually 8kB (the GICC_DIR > register lives at offset 0x1000). > > This was found when converting the GIC driver to use EOImode==1 on > GICv2-based systems. It uses the GICC_DIR register, and the result > is a very early firework... What's your plan for making the kernel change? Updating the dts files is good, but that doesn't immediately help you if you have old dtbs. > Signed-off-by: Marc Zyngier > --- > arch/arm/boot/dts/axm55xx.dtsi | 2 +- > arch/arm/boot/dts/dra7.dtsi | 2 +- > arch/arm/boot/dts/ecx-2000.dts | 2 +- Acked-by: Rob Herring Rob