All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh+dt@kernel.org>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
	John Crispin <john@phrozen.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Hauke Mehrtens <hauke@hauke-m.de>,
	Paul Burton <paul.burton@mips.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Martin Schiller <ms@dev.tdt.de>
Subject: Re: [PATCH v2 1/4] dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs
Date: Fri, 5 Jul 2019 10:20:43 -0600	[thread overview]
Message-ID: <CAL_JsqJ7iA2kPBPLxkUVYXojqB7Hv69Nv4z3qaQveH24b45Jug@mail.gmail.com> (raw)
In-Reply-To: <20190704122319.8983-2-martin.blumenstingl@googlemail.com>

On Thu, Jul 4, 2019 at 6:23 AM Martin Blumenstingl
<martin.blumenstingl@googlemail.com> wrote:
>
> Add the bindings for the PCIe PHY on Lantiq VRX200 and ARX300 SoCs.
> The IP block contains settings for the PHY and a PLL.
> The PLL mode is configurable through a dedicated #phy-cell in .dts.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  .../bindings/phy/lantiq,vrx200-pcie-phy.yaml  | 95 +++++++++++++++++++
>  .../dt-bindings/phy/phy-lantiq-vrx200-pcie.h  | 11 +++
>  2 files changed, 106 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml
>  create mode 100644 include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h

Reviewed-by: Rob Herring <robh@kernel.org>

  reply	other threads:[~2019-07-05 16:21 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-04 12:23 [PATCH v2 0/4] Lantiq VRX200/ARX300 PCIe PHY driver Martin Blumenstingl
2019-07-04 12:23 ` [PATCH v2 1/4] dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs Martin Blumenstingl
2019-07-05 16:20   ` Rob Herring [this message]
2019-10-02 14:36   ` Rob Herring
2019-10-07 20:18     ` Martin Blumenstingl
2019-07-04 12:23 ` [PATCH v2 2/4] phy: lantiq: vrx200-pcie: add a driver for the Lantiq VRX200 PCIe PHY Martin Blumenstingl
2019-07-04 12:23 ` [PATCH v2 3/4] phy: enable compile-testing for the Lantiq PHY drivers Martin Blumenstingl
2019-07-04 12:23 ` [PATCH v2 4/4] MIPS: lantiq: update the clock alias' for the mainline PCIe PHY driver Martin Blumenstingl

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAL_JsqJ7iA2kPBPLxkUVYXojqB7Hv69Nv4z3qaQveH24b45Jug@mail.gmail.com \
    --to=robh+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=hauke@hauke-m.de \
    --cc=john@phrozen.org \
    --cc=kishon@ti.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=martin.blumenstingl@googlemail.com \
    --cc=ms@dev.tdt.de \
    --cc=paul.burton@mips.com \
    --cc=ralf@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.