From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42174C433FE for ; Fri, 15 Oct 2021 15:53:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 224EE611C1 for ; Fri, 15 Oct 2021 15:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241060AbhJOPzj (ORCPT ); Fri, 15 Oct 2021 11:55:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:40974 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241057AbhJOPzh (ORCPT ); Fri, 15 Oct 2021 11:55:37 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 84B47611C3; Fri, 15 Oct 2021 15:53:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634313210; bh=tS7FNEBnAqgSHdk65hsLK29FdzL2hDC78AqH8UwzefQ=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=OHrT4b+SXSuzTq0H9xDZZZmLV0zTtfVyFhvo0WO+8kDr+LNwOlJwZyu236ozwh1P1 z1vxqAjo/G2GZMv/36ip5n1rnG/PrlIJ2DRS4cce8m/X2T+ppbftBvWLTmL+IcoJfO DdhmyBKbUoL/+En8EUTqYo8qKEY6rNc28nYOtMAxpXcI0/ELQaDQ18lojFFS+LggTO ja94yuGAkrgzF81MNoaBGitniK3CZr5Cy0ggPOKEaHXn78wEf+HmmtkLeKOCvIizyi sAQfqUyjIS50kyOm0VLdHCBQm/RE0zUDOfuU+/nPYxu4loQGJ/jebSivyV4SMfCO9w 5fLI0WllxY6dg== Received: by mail-ed1-f44.google.com with SMTP id 5so9652748edw.7; Fri, 15 Oct 2021 08:53:30 -0700 (PDT) X-Gm-Message-State: AOAM531EvUv+o6Gx+uQAr0vaYzUTEIBEjqhszrOd09gfTQ9ACytKwQCy 1cIAgsWkZC6Z1VwrQFGIE4CGNv2ZJ2kb9tnbSw== X-Google-Smtp-Source: ABdhPJyunKq1cAJC1qKjKHXJiMRTFQMjgAl20IaC76YoHiF4Qkdg9DiyQSuuX7aMF23U9kNTRN7zoPQXaEPnO3vi8No= X-Received: by 2002:a17:906:71d4:: with SMTP id i20mr7804418ejk.390.1634313206877; Fri, 15 Oct 2021 08:53:26 -0700 (PDT) MIME-Version: 1.0 References: <20210914204800.3945732-1-robh@kernel.org> <20210914204800.3945732-5-robh@kernel.org> <20211014165810.GA39276@lakrids.cambridge.arm.com> In-Reply-To: <20211014165810.GA39276@lakrids.cambridge.arm.com> From: Rob Herring Date: Fri, 15 Oct 2021 10:53:15 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 4/5] arm64: perf: Enable PMU counter userspace access for perf event To: Mark Rutland Cc: Will Deacon , Peter Zijlstra , Ingo Molnar , Catalin Marinas , Arnaldo Carvalho de Melo , Jiri Olsa , Kan Liang , Ian Rogers , Alexander Shishkin , Honnappa Nagarahalli , Zachary.Leaf@arm.com, Raphael Gault , Jonathan Cameron , Namhyung Kim , Itaru Kitayama , Vince Weaver , linux-arm-kernel , "linux-kernel@vger.kernel.org" , linux-perf-users@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 14, 2021 at 11:58 AM Mark Rutland wrote: > > Hi Rob, > > This looks pretty good! > > I have one largish query below, and otherwise only trivialities that I'm > happy to fix up. > > On Tue, Sep 14, 2021 at 03:47:59PM -0500, Rob Herring wrote: [...] > > static inline bool armv8pmu_event_is_chained(struct perf_event *event) > > { > > int idx = event->hw.idx; > > struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); > > > > - return !WARN_ON(idx < 0) && > > + return !(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT) && > > armv8pmu_event_is_64bit(event) && > > !armv8pmu_has_long_event(cpu_pmu) && > > (idx != ARMV8_IDX_CYCLE_COUNTER); > > @@ -720,6 +726,27 @@ static inline u32 armv8pmu_getreset_flags(void) > > return value; > > Above this, could we please add: > > | static inline bool armv8pmu_event_has_user_read(struct perf_event *event) > | { > | return event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT; > | } > > ... and use that where we look at PERF_EVENT_FLAG_USER_READ_CNT? Sure, but as this is a common flag now, I should probably make that a common function in linux/perf_event.h and have x86 code use it too. Rob From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7146C433F5 for ; Fri, 15 Oct 2021 15:55:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6E747610E8 for ; Fri, 15 Oct 2021 15:55:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6E747610E8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HSSglxhjvvVWt3++NVnF0E2z/CMISqGumCBijmV+/8Y=; b=aQCZxs3JQ5yHy2 FpdO0xJOa/7SEps+LTJVoYUx+HkhDh5jGnCS6CBj+jE67IQZw+9UToIiom7UJk+CNQaSeCoDEx2T7 n1vQZPvIG/GtFfRs/Knk1QZViH5iS10tn9geaz1ShooRJ2cBfIjc8R9hjkhiNKywigbRdzsTd2CYk 4oXALS25JZO0ppqVyv1er16nRTkcKPF1mfCu2qwXPP86gqBTBtzzdovSyzH5b0q+/KG4Iqd3H7jrs Ixe3r+z96yqlegZ2Yw3XZvUT61ghpSO0kS2MwoO5O4yaWMRFB4XCrriy9Hiy0/avuStGuHHqXuHQL 3sVV4yDpaZBTTmzhtKXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbPWX-007y86-L9; Fri, 15 Oct 2021 15:53:34 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbPWT-007y6j-Ig for linux-arm-kernel@lists.infradead.org; Fri, 15 Oct 2021 15:53:30 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 78ECA610E8 for ; Fri, 15 Oct 2021 15:53:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634313208; bh=tS7FNEBnAqgSHdk65hsLK29FdzL2hDC78AqH8UwzefQ=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=IcQS8PXsnZB5l7tA9vzM/QHstZVY+wnjoKgvOuLTLIL4Tp4Hci+peepgvEktCL9sE QLqhC+ifleoNiluKkqi0JWWfh+Nt7Yor1rzxL3pgbbPcz4YTCaOHoT/SujC+QgAwCB R7QUV67VUY3iPRU1PMMb3XBxqSoZWYallvGvPBSkg0pAuWn9nxTj9VwYeLBwqF0VV/ ZRD1c9OGSIR38iHc2SsNQjr44AqogrH5rrrh+ubKQ6Mcbt3yZukl7pYcON5ZZYzIoe g6rippU+4q2pMUtwKudB3ePBZ0kxWfFQYC7G8y5x6DQSg+U8M/P7r9+7v0nty1VIri Xqt0LWS1/McNQ== Received: by mail-ed1-f54.google.com with SMTP id ec8so40033273edb.6 for ; Fri, 15 Oct 2021 08:53:28 -0700 (PDT) X-Gm-Message-State: AOAM532oSn3/Mb7keSFy0e+VoxadtHSkPmT8m0Q8SaDxIIFT/D5qW9aM 60hqBUQBinEeHsl25TaLRLbIxkJJ1YxpfojVig== X-Google-Smtp-Source: ABdhPJyunKq1cAJC1qKjKHXJiMRTFQMjgAl20IaC76YoHiF4Qkdg9DiyQSuuX7aMF23U9kNTRN7zoPQXaEPnO3vi8No= X-Received: by 2002:a17:906:71d4:: with SMTP id i20mr7804418ejk.390.1634313206877; Fri, 15 Oct 2021 08:53:26 -0700 (PDT) MIME-Version: 1.0 References: <20210914204800.3945732-1-robh@kernel.org> <20210914204800.3945732-5-robh@kernel.org> <20211014165810.GA39276@lakrids.cambridge.arm.com> In-Reply-To: <20211014165810.GA39276@lakrids.cambridge.arm.com> From: Rob Herring Date: Fri, 15 Oct 2021 10:53:15 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 4/5] arm64: perf: Enable PMU counter userspace access for perf event To: Mark Rutland Cc: Will Deacon , Peter Zijlstra , Ingo Molnar , Catalin Marinas , Arnaldo Carvalho de Melo , Jiri Olsa , Kan Liang , Ian Rogers , Alexander Shishkin , Honnappa Nagarahalli , Zachary.Leaf@arm.com, Raphael Gault , Jonathan Cameron , Namhyung Kim , Itaru Kitayama , Vince Weaver , linux-arm-kernel , "linux-kernel@vger.kernel.org" , linux-perf-users@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211015_085329_658777_E5E47121 X-CRM114-Status: GOOD ( 17.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Oct 14, 2021 at 11:58 AM Mark Rutland wrote: > > Hi Rob, > > This looks pretty good! > > I have one largish query below, and otherwise only trivialities that I'm > happy to fix up. > > On Tue, Sep 14, 2021 at 03:47:59PM -0500, Rob Herring wrote: [...] > > static inline bool armv8pmu_event_is_chained(struct perf_event *event) > > { > > int idx = event->hw.idx; > > struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); > > > > - return !WARN_ON(idx < 0) && > > + return !(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT) && > > armv8pmu_event_is_64bit(event) && > > !armv8pmu_has_long_event(cpu_pmu) && > > (idx != ARMV8_IDX_CYCLE_COUNTER); > > @@ -720,6 +726,27 @@ static inline u32 armv8pmu_getreset_flags(void) > > return value; > > Above this, could we please add: > > | static inline bool armv8pmu_event_has_user_read(struct perf_event *event) > | { > | return event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT; > | } > > ... and use that where we look at PERF_EVENT_FLAG_USER_READ_CNT? Sure, but as this is a common flag now, I should probably make that a common function in linux/perf_event.h and have x86 code use it too. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel