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Wed, 28 Aug 2019 04:39:43 -0700 (PDT) MIME-Version: 1.0 References: <20190827082652.43840-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20190827082652.43840-2-vadivel.muruganx.ramuthevar@linux.intel.com> <2a915595-be5f-83f4-34e8-34d667875cc2@linux.intel.com> In-Reply-To: <2a915595-be5f-83f4-34e8-34d667875cc2@linux.intel.com> From: Rob Herring Date: Wed, 28 Aug 2019 06:39:32 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY To: "Ramuthevar, Vadivel MuruganX" Cc: Kishon Vijay Abraham I , "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, Andy Shevchenko , cheol.yong.kim@intel.com, qi-ming.wu@intel.com, peter.harliman.liem@intel.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 27, 2019 at 10:47 PM Ramuthevar, Vadivel MuruganX wrote: > > Hi Rob, > > On 27/8/2019 8:39 PM, Rob Herring wrote: > > On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX > > wrote: > >> From: Ramuthevar Vadivel Murugan > >> > >> Add a YAML schema to use the host controller driver with the > >> SDXC PHY on Intel's Lightning Mountain SoC. > >> > >> Signed-off-by: Ramuthevar Vadivel Murugan > >> --- > >> .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ > >> 1 file changed, 50 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> > >> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> new file mode 100644 > >> index 000000000000..be05020880bf > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> @@ -0,0 +1,50 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings > >> + > >> +maintainers: > >> + - Ramuthevar Vadivel Murugan > >> + > >> +description: Binding for SDXC PHY > >> + > >> +properties: > >> + compatible: > >> + const: intel,lgm-sdxc-phy > >> + > >> + intel,syscon: > >> + description: phandle to the sdxc through syscon > >> + $ref: '/schemas/types.yaml#/definitions/phandle' > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + clock-names: > >> + maxItems: 1 > >> + > >> + "#phy-cells": > >> + const: 0 > >> + > >> +required: > >> + - "#phy-cells" > >> + - compatible > >> + - intel,syscon > >> + - clocks > >> + - clock-names > >> + > >> +additionalProperties: false > >> + > >> +examples: > >> + - | > >> + sdxc_phy: sdxc_phy { > >> + compatible = "intel,lgm-sdxc-phy"; > >> + intel,syscon = <&sysconf>; > > Rather than a phandle, can this be a child node of sysconf? You need a > > binding for sysconf first anyways. > intel,syscon is phandle, emmc_phy is not child node of sysconf, access > emmc_phy > register over sysconf so made as reference here. How do you access the emmc_phy registers? They are part of the sysconf address space or the sysconf provides some sort of indirect register access? In case of the former, then emmc_phy should be a child node. That's actually fairly common. Rob From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY Date: Wed, 28 Aug 2019 06:39:32 -0500 Message-ID: References: <20190827082652.43840-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20190827082652.43840-2-vadivel.muruganx.ramuthevar@linux.intel.com> <2a915595-be5f-83f4-34e8-34d667875cc2@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <2a915595-be5f-83f4-34e8-34d667875cc2@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org To: "Ramuthevar, Vadivel MuruganX" Cc: Kishon Vijay Abraham I , "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, Andy Shevchenko , cheol.yong.kim@intel.com, qi-ming.wu@intel.com, peter.harliman.liem@intel.com List-Id: devicetree@vger.kernel.org On Tue, Aug 27, 2019 at 10:47 PM Ramuthevar, Vadivel MuruganX wrote: > > Hi Rob, > > On 27/8/2019 8:39 PM, Rob Herring wrote: > > On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX > > wrote: > >> From: Ramuthevar Vadivel Murugan > >> > >> Add a YAML schema to use the host controller driver with the > >> SDXC PHY on Intel's Lightning Mountain SoC. > >> > >> Signed-off-by: Ramuthevar Vadivel Murugan > >> --- > >> .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ > >> 1 file changed, 50 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> > >> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> new file mode 100644 > >> index 000000000000..be05020880bf > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> @@ -0,0 +1,50 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings > >> + > >> +maintainers: > >> + - Ramuthevar Vadivel Murugan > >> + > >> +description: Binding for SDXC PHY > >> + > >> +properties: > >> + compatible: > >> + const: intel,lgm-sdxc-phy > >> + > >> + intel,syscon: > >> + description: phandle to the sdxc through syscon > >> + $ref: '/schemas/types.yaml#/definitions/phandle' > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + clock-names: > >> + maxItems: 1 > >> + > >> + "#phy-cells": > >> + const: 0 > >> + > >> +required: > >> + - "#phy-cells" > >> + - compatible > >> + - intel,syscon > >> + - clocks > >> + - clock-names > >> + > >> +additionalProperties: false > >> + > >> +examples: > >> + - | > >> + sdxc_phy: sdxc_phy { > >> + compatible = "intel,lgm-sdxc-phy"; > >> + intel,syscon = <&sysconf>; > > Rather than a phandle, can this be a child node of sysconf? You need a > > binding for sysconf first anyways. > intel,syscon is phandle, emmc_phy is not child node of sysconf, access > emmc_phy > register over sysconf so made as reference here. How do you access the emmc_phy registers? They are part of the sysconf address space or the sysconf provides some sort of indirect register access? In case of the former, then emmc_phy should be a child node. That's actually fairly common. Rob