From: Yixun Lan <yixun.lan@gmail.com>
To: Zong Li <zong.li@sifive.com>
Cc: Andreas Schwab <schwab@linux-m68k.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Stephen Boyd <sboyd@kernel.org>,
Pragnesh Patel <pragnesh.patel@openfive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Michael Turquette <mturquette@baylibre.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-clk@vger.kernel.org,
linux-riscv <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v7 0/5] clk: add driver for the SiFive FU740
Date: Fri, 19 Mar 2021 08:44:00 +0000 [thread overview]
Message-ID: <CALecT5iX+Taf=uKy_RoyC9f9BjeSSVgSwF-8U-51N=0PbXwZyw@mail.gmail.com> (raw)
In-Reply-To: <CANXhq0p90Cgha_zLzxamK9mxmVPn3effh_cZq_CTLrcAkKZg2Q@mail.gmail.com>
HI Zong, Andreas:
On Fri, Mar 19, 2021 at 8:21 AM Zong Li <zong.li@sifive.com> wrote:
>
> On Thu, Mar 18, 2021 at 10:07 AM Zong Li <zong.li@sifive.com> wrote:
> >
> > On Wed, Mar 17, 2021 at 3:45 AM Andreas Schwab <schwab@linux-m68k.org> wrote:
> > >
> > > On Dez 09 2020, Zong Li wrote:
> > >
> > > > Add a driver for the SiFive FU740 PRCI IP block, which handles more
> > > > clocks than FU540. These patches also refactor the original
> > > > implementation by spliting the dependent-code of fu540 and fu740
> > > > respectively.
> > >
> > > That breaks ethernet on the fu540.
> > >
> >
> > I would check that, thanks for the report.
> >
>
> Hi Andreas,
>
> Could you please point me out how to test the ethernet from your side?
> I had tried to quick test by using iperf and wget, the ethernet seems
> to work fine to me.
>
I will give it a shot during this weekend, since I'm facing the same issue..
Yixun Lan
WARNING: multiple messages have this Message-ID (diff)
From: Yixun Lan <yixun.lan@gmail.com>
To: Zong Li <zong.li@sifive.com>
Cc: Andreas Schwab <schwab@linux-m68k.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Stephen Boyd <sboyd@kernel.org>,
Pragnesh Patel <pragnesh.patel@openfive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Michael Turquette <mturquette@baylibre.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-clk@vger.kernel.org,
linux-riscv <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v7 0/5] clk: add driver for the SiFive FU740
Date: Fri, 19 Mar 2021 08:44:00 +0000 [thread overview]
Message-ID: <CALecT5iX+Taf=uKy_RoyC9f9BjeSSVgSwF-8U-51N=0PbXwZyw@mail.gmail.com> (raw)
In-Reply-To: <CANXhq0p90Cgha_zLzxamK9mxmVPn3effh_cZq_CTLrcAkKZg2Q@mail.gmail.com>
HI Zong, Andreas:
On Fri, Mar 19, 2021 at 8:21 AM Zong Li <zong.li@sifive.com> wrote:
>
> On Thu, Mar 18, 2021 at 10:07 AM Zong Li <zong.li@sifive.com> wrote:
> >
> > On Wed, Mar 17, 2021 at 3:45 AM Andreas Schwab <schwab@linux-m68k.org> wrote:
> > >
> > > On Dez 09 2020, Zong Li wrote:
> > >
> > > > Add a driver for the SiFive FU740 PRCI IP block, which handles more
> > > > clocks than FU540. These patches also refactor the original
> > > > implementation by spliting the dependent-code of fu540 and fu740
> > > > respectively.
> > >
> > > That breaks ethernet on the fu540.
> > >
> >
> > I would check that, thanks for the report.
> >
>
> Hi Andreas,
>
> Could you please point me out how to test the ethernet from your side?
> I had tried to quick test by using iperf and wget, the ethernet seems
> to work fine to me.
>
I will give it a shot during this weekend, since I'm facing the same issue..
Yixun Lan
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-03-19 8:48 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-09 9:49 [PATCH v7 0/5] clk: add driver for the SiFive FU740 Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-09 9:49 ` [PATCH v7 1/5] clk: sifive: Extract prci core to common base Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 2/5] clk: sifive: Use common name for prci configuration Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 3/5] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 4/5] clk: sifive: Fix the wrong bit field shift Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 5/5] clk: sifive: Add clock enable and disable ops Zong Li
2020-12-09 9:49 ` Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-16 20:21 ` Stephen Boyd
2021-03-16 19:45 ` [PATCH v7 0/5] clk: add driver for the SiFive FU740 Andreas Schwab
2021-03-16 19:45 ` Andreas Schwab
2021-03-18 2:07 ` Zong Li
2021-03-18 2:07 ` Zong Li
2021-03-19 8:20 ` Zong Li
2021-03-19 8:20 ` Zong Li
2021-03-19 8:44 ` Yixun Lan [this message]
2021-03-19 8:44 ` Yixun Lan
2021-03-19 8:49 ` Andreas Schwab
2021-03-19 8:49 ` Andreas Schwab
2021-03-24 10:36 ` Andreas Schwab
2021-03-24 10:36 ` Andreas Schwab
2021-03-25 3:21 ` Zong Li
2021-03-25 3:21 ` Zong Li
2021-03-25 9:22 ` Andreas Schwab
2021-03-25 9:22 ` Andreas Schwab
2021-03-26 9:10 ` Zong Li
2021-03-26 9:10 ` Zong Li
2021-03-26 9:23 ` Andreas Schwab
2021-03-26 9:23 ` Andreas Schwab
2021-03-29 10:18 ` Zong Li
2021-03-29 10:18 ` Zong Li
2021-03-29 10:37 ` Andreas Schwab
2021-03-29 10:37 ` Andreas Schwab
2021-03-31 8:11 ` Zong Li
2021-03-31 8:11 ` Zong Li
2021-04-12 11:31 ` Andreas Schwab
2021-04-12 11:31 ` Andreas Schwab
2021-04-14 14:13 ` Zong Li
2021-04-14 14:13 ` Zong Li
2021-05-11 8:53 ` Yixun Lan
2021-05-11 8:53 ` Yixun Lan
2021-05-19 15:53 ` Zong Li
2021-05-19 15:53 ` Zong Li
2021-05-19 18:17 ` Geert Uytterhoeven
2021-05-19 18:17 ` Geert Uytterhoeven
2021-05-21 10:34 ` Zong Li
2021-05-21 10:34 ` Zong Li
2021-05-21 12:52 ` Zong Li
2021-05-21 12:52 ` Zong Li
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