From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34693) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cssjr-00007f-4L for qemu-devel@nongnu.org; Tue, 28 Mar 2017 11:08:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cssjq-0007UQ-4m for qemu-devel@nongnu.org; Tue, 28 Mar 2017 11:08:51 -0400 MIME-Version: 1.0 In-Reply-To: <1490709513-7180-1-git-send-email-eric.auger@redhat.com> References: <1490709513-7180-1-git-send-email-eric.auger@redhat.com> From: Vijay Kilari Date: Tue, 28 Mar 2017 20:38:46 +0530 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH] hw/intc/arm_gicv3_kvm: Check KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS in reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eric Auger Cc: eric.auger.pro@gmail.com, Peter Maydell , qemu-arm , QEMU Developers , "Kumar, Vijaya" , drjones@redhat.com Hi Eric, On Tue, Mar 28, 2017 at 7:28 PM, Eric Auger wrote: > KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS needs to be checked before > attempting to read ICC_CTLR_EL1; otherwise kernel versions not > exposing this kvm device group will be incompatible with qemu 2.9. > > Fixes: 07a5628 ("hw/intc/arm_gicv3_kvm: Reset GICv3 cpu interface registers") > Signed-off-by: Eric Auger > Reported-by: Prakash B > > --- > > I understand the ICC_CTLR_EL1 state only is used in the put() function > which is used for migration > --- > hw/intc/arm_gicv3_kvm.c | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > > diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c > index 81f0403..4c3a88e 100644 > --- a/hw/intc/arm_gicv3_kvm.c > +++ b/hw/intc/arm_gicv3_kvm.c > @@ -614,12 +614,6 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) > s = c->gic; > cpu = ARM_CPU(c->cpu); > > - /* Initialize to actual HW supported configuration */ > - kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS, > - KVM_VGIC_ATTR(ICC_CTLR_EL1, cpu->mp_affinity), > - &c->icc_ctlr_el1[GICV3_NS], false); > - > - c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS]; > c->icc_pmr_el1 = 0; > c->icc_bpr[GICV3_G0] = GIC_MIN_BPR; > c->icc_bpr[GICV3_G1] = GIC_MIN_BPR; > @@ -628,6 +622,17 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) > c->icc_sre_el1 = 0x7; > memset(c->icc_apr, 0, sizeof(c->icc_apr)); > memset(c->icc_igrpen, 0, sizeof(c->icc_igrpen)); > + > + if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS, > + KVM_VGIC_ATTR(ICC_CTLR_EL1, cpu->mp_affinity))) { > + return; > + } Can't we use gicv3 migration blocker provided if it is set before this reset. > + /* Initialize to actual HW supported configuration */ > + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS, > + KVM_VGIC_ATTR(ICC_CTLR_EL1, cpu->mp_affinity), > + &c->icc_ctlr_el1[GICV3_NS], false); > + > + c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS]; > } > > static void kvm_arm_gicv3_reset(DeviceState *dev) > -- > 2.5.5 >