From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Coquelin Subject: Re: [PATCH v7 05/15] dt-bindings: Document the STM32 reset bindings Date: Tue, 5 May 2015 19:24:04 +0200 Message-ID: References: <1430410844-16062-1-git-send-email-mcoquelin.stm32@gmail.com> <1430410844-16062-6-git-send-email-mcoquelin.stm32@gmail.com> <55433467.2010603@linaro.org> <5544A069.5000808@linaro.org> <5548CEA2.8020807@linaro.org> <1430840557.3035.60.camel@pengutronix.de> <5548EAC1.7010002@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <5548EAC1.7010002@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: Daniel Thompson , Philipp Zabel , Rob Herring , "devicetree@vger.kernel.org" Cc: =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Geert Uytterhoeven , Linus Walleij , Arnd Bergmann , Stefan Agner , Peter Meerwald , Paul Bolle , Peter Hurley , Andy Shevchenko , Chanwoo Choi , Russell King , Daniel Lezcano , Joe Perches , Vladimir Zapolskiy , Jonathan Corbet , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Thomas Gleixner , Greg Kroah-Hartman List-Id: linux-gpio@vger.kernel.org 2015-05-05 18:07 GMT+02:00 Daniel Thompson : > On 05/05/15 16:42, Philipp Zabel wrote: >> >> Am Dienstag, den 05.05.2015, 17:19 +0200 schrieb Maxime Coquelin: >>>>> >>>>> For example, includes/dt-bindings/mfd/stm32f4-rcc.h would look like: >>>>> >>>>> #define GPIOA 0 >>>>> #define GPIOB 1 >>>>> ... >>>>> #define LTDC 186 >> >> >> That looks a bit fragile. >> At least the defines for the indices should be properly namespaced, >> check out include/dt-bindings/gpio/tegra-gpio.h for a similar case. > > > Good point. > >>>>> #define STM32F4_RESET(x) (x + 128) >>>>> #define STM32F4_CLOCK(x) (x + 384) > > > Thinking more about this point, if we are going to follow hardware if might > be better to have: > > #define STM32F4_RCC_AHB1_GPIOA 0 > #define STM32F4_RCC_AHB1_GPIOA 1 > ... > #define STM32F4_RCC_APB2_LTDC 26 > > > #define STM32F4_AHB1_RESET(x) (STM32F4_RCC_AHB1_##x##_BIT + (0x10 * 8)) > #define STM32F4_AHB2_RESET(x) (STM32F4_RCC_AHB2_##x##_BIT + (0x14 * 8)) > ... > #define STM32F4_APB2_RESET(x) (STM32F4_RCC_APB2_##x##_BIT + (0x24 * 8)) > > Its more typing (or copy 'n pasting) by at least every number now maps > directly to the datasheet. As said in Philipp's reply, I like the idea. Regards, Maxime > > > >>>>> >>>>> Then, in DT, a reset would be described like this: >>>>> >>>>> timer2 { >>>>> resets = <&rcc STM32F4_RESET(TIM2)>; >>>>> }; >>>>> >>>>> Phillip, Daniel, does that look acceptable to you? >>>> >>>> >>>> >>>> Doesn't look unreasonable. >>>> >>>> I am a little uneasy simply because there are very few similar header >>>> files >>>> in that directory but I haven't thought of a better idea. >>> >>> >>> Since this file will be shared by both clock and reset drivers, I >>> don't see better option. >>> I will implement it in v8 if Philipp agrees. >> >> >> Are the device tree maintainers happy with this idiom spreading? >> Except for the point above, I think this is acceptable. >> >> regards >> Philipp >> > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932895AbbEERYO (ORCPT ); Tue, 5 May 2015 13:24:14 -0400 Received: from mail-wg0-f43.google.com ([74.125.82.43]:36350 "EHLO mail-wg0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761869AbbEERYH (ORCPT ); Tue, 5 May 2015 13:24:07 -0400 MIME-Version: 1.0 In-Reply-To: <5548EAC1.7010002@linaro.org> References: <1430410844-16062-1-git-send-email-mcoquelin.stm32@gmail.com> <1430410844-16062-6-git-send-email-mcoquelin.stm32@gmail.com> <55433467.2010603@linaro.org> <5544A069.5000808@linaro.org> <5548CEA2.8020807@linaro.org> <1430840557.3035.60.camel@pengutronix.de> <5548EAC1.7010002@linaro.org> Date: Tue, 5 May 2015 19:24:04 +0200 Message-ID: Subject: Re: [PATCH v7 05/15] dt-bindings: Document the STM32 reset bindings From: Maxime Coquelin To: Daniel Thompson , Philipp Zabel , Rob Herring , "devicetree@vger.kernel.org" Cc: =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Geert Uytterhoeven , Linus Walleij , Arnd Bergmann , Stefan Agner , Peter Meerwald , Paul Bolle , Peter Hurley , Andy Shevchenko , Chanwoo Choi , Russell King , Daniel Lezcano , Joe Perches , Vladimir Zapolskiy , Jonathan Corbet , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Thomas Gleixner , Greg Kroah-Hartman , Jiri Slaby , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , "linux-doc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-serial@vger.kernel.org" , Linux-Arch , "linux-api@vger.kernel.org" , Nicolae Rosia , Kamil Lulko , Lee Jones Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2015-05-05 18:07 GMT+02:00 Daniel Thompson : > On 05/05/15 16:42, Philipp Zabel wrote: >> >> Am Dienstag, den 05.05.2015, 17:19 +0200 schrieb Maxime Coquelin: >>>>> >>>>> For example, includes/dt-bindings/mfd/stm32f4-rcc.h would look like: >>>>> >>>>> #define GPIOA 0 >>>>> #define GPIOB 1 >>>>> ... >>>>> #define LTDC 186 >> >> >> That looks a bit fragile. >> At least the defines for the indices should be properly namespaced, >> check out include/dt-bindings/gpio/tegra-gpio.h for a similar case. > > > Good point. > >>>>> #define STM32F4_RESET(x) (x + 128) >>>>> #define STM32F4_CLOCK(x) (x + 384) > > > Thinking more about this point, if we are going to follow hardware if might > be better to have: > > #define STM32F4_RCC_AHB1_GPIOA 0 > #define STM32F4_RCC_AHB1_GPIOA 1 > ... > #define STM32F4_RCC_APB2_LTDC 26 > > > #define STM32F4_AHB1_RESET(x) (STM32F4_RCC_AHB1_##x##_BIT + (0x10 * 8)) > #define STM32F4_AHB2_RESET(x) (STM32F4_RCC_AHB2_##x##_BIT + (0x14 * 8)) > ... > #define STM32F4_APB2_RESET(x) (STM32F4_RCC_APB2_##x##_BIT + (0x24 * 8)) > > Its more typing (or copy 'n pasting) by at least every number now maps > directly to the datasheet. As said in Philipp's reply, I like the idea. Regards, Maxime > > > >>>>> >>>>> Then, in DT, a reset would be described like this: >>>>> >>>>> timer2 { >>>>> resets = <&rcc STM32F4_RESET(TIM2)>; >>>>> }; >>>>> >>>>> Phillip, Daniel, does that look acceptable to you? >>>> >>>> >>>> >>>> Doesn't look unreasonable. >>>> >>>> I am a little uneasy simply because there are very few similar header >>>> files >>>> in that directory but I haven't thought of a better idea. >>> >>> >>> Since this file will be shared by both clock and reset drivers, I >>> don't see better option. >>> I will implement it in v8 if Philipp agrees. >> >> >> Are the device tree maintainers happy with this idiom spreading? >> Except for the point above, I think this is acceptable. >> >> regards >> Philipp >> > From mboxrd@z Thu Jan 1 00:00:00 1970 From: mcoquelin.stm32@gmail.com (Maxime Coquelin) Date: Tue, 5 May 2015 19:24:04 +0200 Subject: [PATCH v7 05/15] dt-bindings: Document the STM32 reset bindings In-Reply-To: <5548EAC1.7010002@linaro.org> References: <1430410844-16062-1-git-send-email-mcoquelin.stm32@gmail.com> <1430410844-16062-6-git-send-email-mcoquelin.stm32@gmail.com> <55433467.2010603@linaro.org> <5544A069.5000808@linaro.org> <5548CEA2.8020807@linaro.org> <1430840557.3035.60.camel@pengutronix.de> <5548EAC1.7010002@linaro.org> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org 2015-05-05 18:07 GMT+02:00 Daniel Thompson : > On 05/05/15 16:42, Philipp Zabel wrote: >> >> Am Dienstag, den 05.05.2015, 17:19 +0200 schrieb Maxime Coquelin: >>>>> >>>>> For example, includes/dt-bindings/mfd/stm32f4-rcc.h would look like: >>>>> >>>>> #define GPIOA 0 >>>>> #define GPIOB 1 >>>>> ... >>>>> #define LTDC 186 >> >> >> That looks a bit fragile. >> At least the defines for the indices should be properly namespaced, >> check out include/dt-bindings/gpio/tegra-gpio.h for a similar case. > > > Good point. > >>>>> #define STM32F4_RESET(x) (x + 128) >>>>> #define STM32F4_CLOCK(x) (x + 384) > > > Thinking more about this point, if we are going to follow hardware if might > be better to have: > > #define STM32F4_RCC_AHB1_GPIOA 0 > #define STM32F4_RCC_AHB1_GPIOA 1 > ... > #define STM32F4_RCC_APB2_LTDC 26 > > > #define STM32F4_AHB1_RESET(x) (STM32F4_RCC_AHB1_##x##_BIT + (0x10 * 8)) > #define STM32F4_AHB2_RESET(x) (STM32F4_RCC_AHB2_##x##_BIT + (0x14 * 8)) > ... > #define STM32F4_APB2_RESET(x) (STM32F4_RCC_APB2_##x##_BIT + (0x24 * 8)) > > Its more typing (or copy 'n pasting) by at least every number now maps > directly to the datasheet. As said in Philipp's reply, I like the idea. Regards, Maxime > > > >>>>> >>>>> Then, in DT, a reset would be described like this: >>>>> >>>>> timer2 { >>>>> resets = <&rcc STM32F4_RESET(TIM2)>; >>>>> }; >>>>> >>>>> Phillip, Daniel, does that look acceptable to you? >>>> >>>> >>>> >>>> Doesn't look unreasonable. >>>> >>>> I am a little uneasy simply because there are very few similar header >>>> files >>>> in that directory but I haven't thought of a better idea. >>> >>> >>> Since this file will be shared by both clock and reset drivers, I >>> don't see better option. >>> I will implement it in v8 if Philipp agrees. >> >> >> Are the device tree maintainers happy with this idiom spreading? >> Except for the point above, I think this is acceptable. >> >> regards >> Philipp >> >