From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756680AbbCMRfa (ORCPT ); Fri, 13 Mar 2015 13:35:30 -0400 Received: from mail-we0-f181.google.com ([74.125.82.181]:38009 "EHLO mail-we0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751415AbbCMRf2 (ORCPT ); Fri, 13 Mar 2015 13:35:28 -0400 MIME-Version: 1.0 In-Reply-To: <1426203380-7155-3-git-send-email-stefan@agner.ch> References: <1426203380-7155-1-git-send-email-stefan@agner.ch> <1426203380-7155-3-git-send-email-stefan@agner.ch> Date: Fri, 13 Mar 2015 18:35:26 +0100 Message-ID: Subject: Re: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain From: Maxime Coquelin To: Stefan Agner Cc: shawn.guo@linaro.org, kernel@pengutronix.de, Russell King , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , jason@lakedaemon.net, olof@lixom.net, Arnd Bergmann , Daniel Lezcano , Thomas Gleixner , Mark Rutland , Pawel Moll , Rob Herring , Ian Campbell , Kumar Gala , marc.zyngier@arm.com, "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2015-03-13 0:36 GMT+01:00 Stefan Agner : > Add support for hierarchy irq domain. Use to support the interrupt > router found in Vybrid SoC, which is between the NVIC and the > peripherals. > > Signed-off-by: Stefan Agner > --- > drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c > index 4ff0805..5fac910 100644 > --- a/drivers/irqchip/irq-nvic.c > +++ b/drivers/irqchip/irq-nvic.c > @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > handle_IRQ(irq, regs); > } > > +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, > + unsigned int nr_irqs, void *arg) > +{ > + int i, ret; > + irq_hw_number_t hwirq; > + unsigned int type = IRQ_TYPE_NONE; > + struct of_phandle_args *irq_data = arg; > + > + ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args, > + irq_data->args_count, &hwirq, &type); > + if (ret) > + return ret; > + > + for (i = 0; i < nr_irqs; i++) > + irq_map_generic_chip(domain, virq + i, hwirq + i); > + > + return 0; > +} > + > +static const struct irq_domain_ops nvic_irq_domain_ops = { > + .xlate = irq_domain_xlate_onecell, > + .alloc = nvic_irq_domain_alloc, .alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is not selected by in the config ARM_NVIC entry. It breaks the build with my STM32 series. Once selected, the build is fine, and the board boots successfully. Best regards, Maxime From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Coquelin Subject: Re: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain Date: Fri, 13 Mar 2015 18:35:26 +0100 Message-ID: References: <1426203380-7155-1-git-send-email-stefan@agner.ch> <1426203380-7155-3-git-send-email-stefan@agner.ch> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <1426203380-7155-3-git-send-email-stefan-XLVq0VzYD2Y@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Stefan Agner Cc: shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, Russell King , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org, olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org, Arnd Bergmann , Daniel Lezcano , Thomas Gleixner , Mark Rutland , Pawel Moll , Rob Herring , Ian Campbell , Kumar Gala , marc.zyngier-5wv7dgnIgG8@public.gmane.org, "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: devicetree@vger.kernel.org 2015-03-13 0:36 GMT+01:00 Stefan Agner : > Add support for hierarchy irq domain. Use to support the interrupt > router found in Vybrid SoC, which is between the NVIC and the > peripherals. > > Signed-off-by: Stefan Agner > --- > drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c > index 4ff0805..5fac910 100644 > --- a/drivers/irqchip/irq-nvic.c > +++ b/drivers/irqchip/irq-nvic.c > @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > handle_IRQ(irq, regs); > } > > +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, > + unsigned int nr_irqs, void *arg) > +{ > + int i, ret; > + irq_hw_number_t hwirq; > + unsigned int type = IRQ_TYPE_NONE; > + struct of_phandle_args *irq_data = arg; > + > + ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args, > + irq_data->args_count, &hwirq, &type); > + if (ret) > + return ret; > + > + for (i = 0; i < nr_irqs; i++) > + irq_map_generic_chip(domain, virq + i, hwirq + i); > + > + return 0; > +} > + > +static const struct irq_domain_ops nvic_irq_domain_ops = { > + .xlate = irq_domain_xlate_onecell, > + .alloc = nvic_irq_domain_alloc, .alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is not selected by in the config ARM_NVIC entry. It breaks the build with my STM32 series. Once selected, the build is fine, and the board boots successfully. Best regards, Maxime -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: mcoquelin.stm32@gmail.com (Maxime Coquelin) Date: Fri, 13 Mar 2015 18:35:26 +0100 Subject: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain In-Reply-To: <1426203380-7155-3-git-send-email-stefan@agner.ch> References: <1426203380-7155-1-git-send-email-stefan@agner.ch> <1426203380-7155-3-git-send-email-stefan@agner.ch> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org 2015-03-13 0:36 GMT+01:00 Stefan Agner : > Add support for hierarchy irq domain. Use to support the interrupt > router found in Vybrid SoC, which is between the NVIC and the > peripherals. > > Signed-off-by: Stefan Agner > --- > drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c > index 4ff0805..5fac910 100644 > --- a/drivers/irqchip/irq-nvic.c > +++ b/drivers/irqchip/irq-nvic.c > @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > handle_IRQ(irq, regs); > } > > +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, > + unsigned int nr_irqs, void *arg) > +{ > + int i, ret; > + irq_hw_number_t hwirq; > + unsigned int type = IRQ_TYPE_NONE; > + struct of_phandle_args *irq_data = arg; > + > + ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args, > + irq_data->args_count, &hwirq, &type); > + if (ret) > + return ret; > + > + for (i = 0; i < nr_irqs; i++) > + irq_map_generic_chip(domain, virq + i, hwirq + i); > + > + return 0; > +} > + > +static const struct irq_domain_ops nvic_irq_domain_ops = { > + .xlate = irq_domain_xlate_onecell, > + .alloc = nvic_irq_domain_alloc, .alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is not selected by in the config ARM_NVIC entry. It breaks the build with my STM32 series. Once selected, the build is fine, and the board boots successfully. Best regards, Maxime