From: Matthew Auld <matthew.william.auld@gmail.com>
To: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH V3] drm/i915/adl_s: Fix dma_mask_size to 39 bit
Date: Thu, 8 Jul 2021 10:16:15 +0100 [thread overview]
Message-ID: <CAM0jSHM_1xqB43oYydS=i3kjyHPYiQn6rSbPymVvH=nN-eTQaQ@mail.gmail.com> (raw)
In-Reply-To: <20210708071222.955455-1-tejaskumarx.surendrakumar.upadhyay@intel.com>
On Thu, 8 Jul 2021 at 08:21, Tejas Upadhyay
<tejaskumarx.surendrakumar.upadhyay@intel.com> wrote:
>
> 46 bit addressing enables you to use 4 bits to support some
> MKTME features, and 3 more bits for Optane support that uses
> a subset of MTKME for persistent memory.
>
> But GTT addressing sticking to 39 bit addressing, thus setting
> dma_mask_size to 39 fixes below tests :
> igt@i915_selftest@live@mman
> igt@kms_big_fb@linear-32bpp-rotate-0
> igt@gem_create@create-clear
> igt@gem_mmap_offset@clear
> igt@gem_mmap_gtt@cpuset-big-copy
>
> In a way solves Gitlab#3142
> https://gitlab.freedesktop.org/drm/intel/-/issues/3142, which had
> following errors :
> DMAR: DRHD: handling fault status reg 2
> DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr
> 7effff9000 [fault reason 05] PTE Write access is not set
>
> 0x7effff9000 is suspiciously exactly 39 bits, so it seems likely that
> the HW just ends up masking off those extra bits hence DMA errors.
>
> Changes since V2 :
> - dim checkpatch error solved
> Changes since V1 :
> - Added more details to commit message - Matthew Auld
>
> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
> Acked-by: Matthew Auld <matthew.auld@intel.com>
Pushed to drm-intel-gt-next. Thanks for the patch.
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next prev parent reply other threads:[~2021-07-08 9:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 7:12 [Intel-gfx] [PATCH V3] drm/i915/adl_s: Fix dma_mask_size to 39 bit Tejas Upadhyay
2021-07-08 8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/adl_s: Fix dma_mask_size to 39 bit (rev3) Patchwork
2021-07-08 9:16 ` Matthew Auld [this message]
2021-07-08 11:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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