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From: Matthew Auld <matthew.william.auld@gmail.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Wrap all access to i915_vma.node.start|size
Date: Fri, 12 Feb 2021 12:55:30 +0000	[thread overview]
Message-ID: <CAM0jSHMmyaFfObuQMhKrsyiEtVW9M8U4KSGVLpk+T1czF=22dQ@mail.gmail.com> (raw)
In-Reply-To: <20210212102224.31060-1-chris@chris-wilson.co.uk>

On Fri, 12 Feb 2021 at 10:22, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> We already wrap i915_vma.node.start for use with the GGTT, as there we
> can perform additional sanity checks that the node belongs to the GGTT
> and fits within the 32b registers. In the next couple of patches, we
> will introduce guard pages around the objects _inside_ the drm_mm_node
> allocation. That is we will offset the vma->pages so that the first page
> is at drm_mm_node.start + vma->guard (not 0 as is currently the case).
> All users must then not use i915_vma.node.start directly, but compute
> the guard offset, thus all users are converted to use a
> i915_vma_offset() wrapper.
>
> The notable exceptions are the selftests that are testing exact
> behaviour of i915_vma_pin/i915_vma_insert.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---

<snip>

> @@ -562,10 +562,11 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
>         GEM_BUG_ON(!i915_vma_is_ggtt(vma));
>         GEM_BUG_ON(!vma->fence_size);
>
> -       fenceable = (vma->node.size >= vma->fence_size &&
> -                    IS_ALIGNED(vma->node.start, vma->fence_alignment));
> +       fenceable = (i915_vma_size(vma) >= vma->fence_size &&
> +                    IS_ALIGNED(i915_vma_offset(vma), vma->fence_alignment));
>
> -       mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end;
> +       mappable = (i915_vma_offset(vma) + vma->fence_size <=
> +                   i915_vm_to_ggtt(vma->vm)->mappable_end);

i915_ggtt_offset(vma) could be used here.

Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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  parent reply	other threads:[~2021-02-12 12:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-12 10:22 [Intel-gfx] [PATCH 1/3] drm/i915: Wrap all access to i915_vma.node.start|size Chris Wilson
2021-02-12 10:22 ` [Intel-gfx] [PATCH 2/3] drm/i915: Introduce guard pages to i915_vma Chris Wilson
2021-02-12 13:43   ` Matthew Auld
2021-02-12 13:55     ` Chris Wilson
2021-02-12 10:22 ` [Intel-gfx] [PATCH 3/3] drm/i915: Refine VT-d scanout workaround Chris Wilson
2021-02-12 13:46   ` Matthew Auld
2021-02-12 10:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Wrap all access to i915_vma.node.start|size Patchwork
2021-02-12 11:32 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-02-12 12:55 ` Matthew Auld [this message]
2021-02-15 15:56 [Intel-gfx] [PATCH 1/3] " Chris Wilson
2021-12-02  8:31 [Intel-gfx] [PATCH 0/3] Replace VT-d workaround with guard pages Tejas Upadhyay
2021-12-02  8:31 ` [Intel-gfx] [PATCH 1/3] drm/i915: Wrap all access to i915_vma.node.start|size Tejas Upadhyay
2021-12-03  9:02   ` Ramalingam C
2022-11-09 16:49 [PATCH 0/3] add guard patting around i915_vma Andi Shyti
2022-11-09 16:49 ` [Intel-gfx] [PATCH 1/3] drm/i915: Wrap all access to i915_vma.node.start|size Andi Shyti
2022-11-09 17:40 [PATCH 0/3] add guard padding around i915_vma Andi Shyti
2022-11-09 17:40 ` [Intel-gfx] [PATCH 1/3] drm/i915: Wrap all access to i915_vma.node.start|size Andi Shyti

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