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b=XuQbgjnj8V7DNTkCKW29+C16Q/7/MiyYeGOMJzcbY/RJXYQP8yOPzo93jheJdxDT8p Rd4VK8bJFVhsmzVUjDsrNQk273WczWpLIV/MD/mExUu6+r9F/ZQLJ1vesovRtUzb8H/M EBS5pC8ZIrcx0RQd+EFBzXeMLmmuDIaPLVPI1O2H9TEpV+IUorEyQgRdZPFdjykOd+PC b6vmbYgRgfef6tTbKN6DZEQ94Fi2vD3C5OGTwPttvGnOFa8REF0gKXhRxwpXdHUTqH2x SDezGM7evH4FyCZUm/H4lJoDTjQBocgTabA2HYDB18EwZiaI3cK5lxpYarlaHbr2AxLK z9IQ== X-Gm-Message-State: AOAM530PuyoMCF1bsQSssVq19xM/4SrC3uRB0rTK1v0pqFYAXeioEMMB dE+os27Xo7NZMvVY0uxlhShGIngkMTM3DwWKM/v2Lw== X-Google-Smtp-Source: ABdhPJyrFOSVHy/IwMUSKgvhvHKKtX+JwNLhMcGPS5ycnOhaDiWmX5yUj2C9vHYIh3CK1j356UDfQ2OHR1ejK29+JaU= X-Received: by 2002:ac2:5335:: with SMTP id f21mr1844285lfh.288.1618771194595; Sun, 18 Apr 2021 11:39:54 -0700 (PDT) MIME-Version: 1.0 References: <20210303200253.1827553-1-atish.patra@wdc.com> <20210303200253.1827553-4-atish.patra@wdc.com> <7eb2b954-6b0a-b143-9107-57f4dd90d0cf@ghiti.fr> In-Reply-To: From: Vitaly Wool Date: Sun, 18 Apr 2021 20:39:43 +0200 Message-ID: Subject: Re: [PATCH v4 3/5] RISC-V: Initial DTS for Microchip ICICLE board To: Atish Patra Cc: Alex Ghiti , Atish Patra , LKML , Albert Ou , Alistair Francis , Anup Patel , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , devicetree , linux-riscv , Palmer Dabbelt , Paul Walmsley , Rob Herring , Conor.Dooley@microchip.com, Daire McNamara , Ivan.Griffin@microchip.com, Lewis.Hanly@microchip.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Atish, On Sun, Apr 18, 2021 at 5:37 AM Atish Patra wrote: > > On Mon, Mar 29, 2021 at 10:04 AM Vitaly Wool w= rote: > > > > On Sat, Mar 27, 2021 at 6:24 PM Alex Ghiti wrote: > > > > > > Hi Atish, > > > > > > Le 3/3/21 =C3=A0 3:02 PM, Atish Patra a =C3=A9crit : > > > > Add initial DTS for Microchip ICICLE board having only > > > > essential devices (clocks, sdhci, ethernet, serial, etc). > > > > The device tree is based on the U-Boot patch. > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20201110103414.101= 42-6-padmarao.begari@microchip.com/ > > > > > > > > Signed-off-by: Atish Patra > > > > --- > > > > arch/riscv/boot/dts/Makefile | 1 + > > > > arch/riscv/boot/dts/microchip/Makefile | 2 + > > > > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ > > > > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 +++++++++++++= +++++ > > > > 4 files changed, 404 insertions(+) > > > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile > > > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-i= cicle-kit.dts > > > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.d= tsi > > > > > > > > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Mak= efile > > > > index 7ffd502e3e7b..fe996b88319e 100644 > > > > --- a/arch/riscv/boot/dts/Makefile > > > > +++ b/arch/riscv/boot/dts/Makefile > > > > @@ -1,5 +1,6 @@ > > > > # SPDX-License-Identifier: GPL-2.0 > > > > subdir-y +=3D sifive > > > > subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) +=3D canaan > > > > +subdir-y +=3D microchip > > > > > > > > obj-$(CONFIG_BUILTIN_DTB) :=3D $(addsuffix /, $(subdir-y)) > > > > diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/bo= ot/dts/microchip/Makefile > > > > new file mode 100644 > > > > index 000000000000..622b12771fd3 > > > > --- /dev/null > > > > +++ b/arch/riscv/boot/dts/microchip/Makefile > > > > @@ -0,0 +1,2 @@ > > > > +# SPDX-License-Identifier: GPL-2.0 > > > > +dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) +=3D microchip-mpfs-icicle-k= it.dtb > > > > > > I'm playing (or trying to...) with XIP_KERNEL and I had to add the > > > following to have the device tree actually builtin the kernel: > > > > > > diff --git a/arch/riscv/boot/dts/microchip/Makefile > > > b/arch/riscv/boot/dts/microchip/Makefile > > > index 622b12771fd3..855c1502d912 100644 > > > --- a/arch/riscv/boot/dts/microchip/Makefile > > > +++ b/arch/riscv/boot/dts/microchip/Makefile > > > @@ -1,2 +1,3 @@ > > > # SPDX-License-Identifier: GPL-2.0 > > > dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) +=3D microchip-mpfs-icicle-ki= t.dtb > > > +obj-$(CONFIG_BUILTIN_DTB) +=3D $(addsuffix .o, $(dtb-y)) > > > > > > Alex > > > > Yes, I believe this is necessary for BUILTIN_DTB to work on Polarfire, > > regardless of whether the kernel is XIP or not. > > > > But there is no usecase for BUILTIN_DTB for polarfire except XIP kernel. > The bootloaders for polarfire is capable of providing a DTB to kernel. I have hard time seeing an industrial application with a bootloader mounting a vfat partition to load a device tree file. So there has to be a less obscure and less time consuming alternative. And if the mainline kernel doesn't provide it (e. g. in the form of support for BUILTIN_DTB) it opens up for error prone custom solutions from various vendors. Is that really what we want? Best regards, Vitaly > If XIP kernel is enabled, the following line in > arch/riscv/boot/dts/Makefile should take care of things > > > > Best regards, > > Vitaly > > > > > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-ki= t.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > > > > new file mode 100644 > > > > index 000000000000..ec79944065c9 > > > > --- /dev/null > > > > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > > > > @@ -0,0 +1,72 @@ > > > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > > > > +/* Copyright (c) 2020 Microchip Technology Inc */ > > > > + > > > > +/dts-v1/; > > > > + > > > > +#include "microchip-mpfs.dtsi" > > > > + > > > > +/* Clock frequency (in Hz) of the rtcclk */ > > > > +#define RTCCLK_FREQ 1000000 > > > > + > > > > +/ { > > > > + #address-cells =3D <2>; > > > > + #size-cells =3D <2>; > > > > + model =3D "Microchip PolarFire-SoC Icicle Kit"; > > > > + compatible =3D "microchip,mpfs-icicle-kit"; > > > > + > > > > + chosen { > > > > + stdout-path =3D &serial0; > > > > + }; > > > > + > > > > + cpus { > > > > + timebase-frequency =3D ; > > > > + }; > > > > + > > > > + memory@80000000 { > > > > + device_type =3D "memory"; > > > > + reg =3D <0x0 0x80000000 0x0 0x40000000>; > > > > + clocks =3D <&clkcfg 26>; > > > > + }; > > > > + > > > > + soc { > > > > + }; > > > > +}; > > > > + > > > > +&serial0 { > > > > + status =3D "okay"; > > > > +}; > > > > + > > > > +&serial1 { > > > > + status =3D "okay"; > > > > +}; > > > > + > > > > +&serial2 { > > > > + status =3D "okay"; > > > > +}; > > > > + > > > > +&serial3 { > > > > + status =3D "okay"; > > > > +}; > > > > + > > > > +&sdcard { > > > > + status =3D "okay"; > > > > +}; > > > > + > > > > +&emac0 { > > > > + phy-mode =3D "sgmii"; > > > > + phy-handle =3D <&phy0>; > > > > + phy0: ethernet-phy@8 { > > > > + reg =3D <8>; > > > > + ti,fifo-depth =3D <0x01>; > > > > + }; > > > > +}; > > > > + > > > > +&emac1 { > > > > + status =3D "okay"; > > > > + phy-mode =3D "sgmii"; > > > > + phy-handle =3D <&phy1>; > > > > + phy1: ethernet-phy@9 { > > > > + reg =3D <9>; > > > > + ti,fifo-depth =3D <0x01>; > > > > + }; > > > > +}; > > > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/ar= ch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > > > > new file mode 100644 > > > > index 000000000000..b9819570a7d1 > > > > --- /dev/null > > > > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > > > > @@ -0,0 +1,329 @@ > > > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > > > > +/* Copyright (c) 2020 Microchip Technology Inc */ > > > > + > > > > +/dts-v1/; > > > > + > > > > +/ { > > > > + #address-cells =3D <2>; > > > > + #size-cells =3D <2>; > > > > + model =3D "Microchip MPFS Icicle Kit"; > > > > + compatible =3D "microchip,mpfs-icicle-kit"; > > > > + > > > > + chosen { > > > > + }; > > > > + > > > > + cpus { > > > > + #address-cells =3D <1>; > > > > + #size-cells =3D <0>; > > > > + > > > > + cpu@0 { > > > > + clock-frequency =3D <0>; > > > > + compatible =3D "sifive,e51", "sifive,rocket0"= , "riscv"; > > > > + device_type =3D "cpu"; > > > > + i-cache-block-size =3D <64>; > > > > + i-cache-sets =3D <128>; > > > > + i-cache-size =3D <16384>; > > > > + reg =3D <0>; > > > > + riscv,isa =3D "rv64imac"; > > > > + status =3D "disabled"; > > > > + > > > > + cpu0_intc: interrupt-controller { > > > > + #interrupt-cells =3D <1>; > > > > + compatible =3D "riscv,cpu-intc"; > > > > + interrupt-controller; > > > > + }; > > > > + }; > > > > + > > > > + cpu@1 { > > > > + clock-frequency =3D <0>; > > > > + compatible =3D "sifive,u54-mc", "sifive,rocke= t0", "riscv"; > > > > + d-cache-block-size =3D <64>; > > > > + d-cache-sets =3D <64>; > > > > + d-cache-size =3D <32768>; > > > > + d-tlb-sets =3D <1>; > > > > + d-tlb-size =3D <32>; > > > > + device_type =3D "cpu"; > > > > + i-cache-block-size =3D <64>; > > > > + i-cache-sets =3D <64>; > > > > + i-cache-size =3D <32768>; > > > > + i-tlb-sets =3D <1>; > > > > + i-tlb-size =3D <32>; > > > > + mmu-type =3D "riscv,sv39"; > > > > + reg =3D <1>; > > > > + riscv,isa =3D "rv64imafdc"; > > > > + tlb-split; > > > > + status =3D "okay"; > > > > + > > > > + cpu1_intc: interrupt-controller { > > > > + #interrupt-cells =3D <1>; > > > > + compatible =3D "riscv,cpu-intc"; > > > > + interrupt-controller; > > > > + }; > > > > + }; > > > > + > > > > + cpu@2 { > > > > + clock-frequency =3D <0>; > > > > + compatible =3D "sifive,u54-mc", "sifive,rocke= t0", "riscv"; > > > > + d-cache-block-size =3D <64>; > > > > + d-cache-sets =3D <64>; > > > > + d-cache-size =3D <32768>; > > > > + d-tlb-sets =3D <1>; > > > > + d-tlb-size =3D <32>; > > > > + device_type =3D "cpu"; > > > > + i-cache-block-size =3D <64>; > > > > + i-cache-sets =3D <64>; > > > > + i-cache-size =3D <32768>; > > > > + i-tlb-sets =3D <1>; > > > > + i-tlb-size =3D <32>; > > > > + mmu-type =3D "riscv,sv39"; > > > > + reg =3D <2>; > > > > + riscv,isa =3D "rv64imafdc"; > > > > + tlb-split; > > > > + status =3D "okay"; > > > > + > > > > + cpu2_intc: interrupt-controller { > > > > + #interrupt-cells =3D <1>; > > > > + compatible =3D "riscv,cpu-intc"; > > > > + interrupt-controller; > > > > + }; > > > > + }; > > > > + > > > > + cpu@3 { > > > > + clock-frequency =3D <0>; > > > > + compatible =3D "sifive,u54-mc", "sifive,rocke= t0", "riscv"; > > > > + d-cache-block-size =3D <64>; > > > > + d-cache-sets =3D <64>; > > > > + d-cache-size =3D <32768>; > > > > + d-tlb-sets =3D <1>; > > > > + d-tlb-size =3D <32>; > > > > + device_type =3D "cpu"; > > > > + i-cache-block-size =3D <64>; > > > > + i-cache-sets =3D <64>; > > > > + i-cache-size =3D <32768>; > > > > + i-tlb-sets =3D <1>; > > > > + i-tlb-size =3D <32>; > > > > + mmu-type =3D "riscv,sv39"; > > > > + reg =3D <3>; > > > > + riscv,isa =3D "rv64imafdc"; > > > > + tlb-split; > > > > + status =3D "okay"; > > > > + > > > > + cpu3_intc: interrupt-controller { > > > > + #interrupt-cells =3D <1>; > > > > + compatible =3D "riscv,cpu-intc"; > > > > + interrupt-controller; > > > > + }; > > > > + }; > > > > + > > > > + cpu@4 { > > > > + clock-frequency =3D <0>; > > > > + compatible =3D "sifive,u54-mc", "sifive,rocke= t0", "riscv"; > > > > + d-cache-block-size =3D <64>; > > > > + d-cache-sets =3D <64>; > > > > + d-cache-size =3D <32768>; > > > > + d-tlb-sets =3D <1>; > > > > + d-tlb-size =3D <32>; > > > > + device_type =3D "cpu"; > > > > + i-cache-block-size =3D <64>; > > > > + i-cache-sets =3D <64>; > > > > + i-cache-size =3D <32768>; > > > > + i-tlb-sets =3D <1>; > > > > + i-tlb-size =3D <32>; > > > > + mmu-type =3D "riscv,sv39"; > > > > + reg =3D <4>; > > > > + riscv,isa =3D "rv64imafdc"; > > > > + tlb-split; > > > > + status =3D "okay"; > > > > + cpu4_intc: interrupt-controller { > > > > + #interrupt-cells =3D <1>; > > > > + compatible =3D "riscv,cpu-intc"; > > > > + interrupt-controller; > > > > + }; > > > > + }; > > > > + }; > > > > + > > > > + soc { > > > > + #address-cells =3D <2>; > > > > + #size-cells =3D <2>; > > > > + compatible =3D "simple-bus"; > > > > + ranges; > > > > + > > > > + cache-controller@2010000 { > > > > + compatible =3D "sifive,fu540-c000-ccache", "c= ache"; > > > > + cache-block-size =3D <64>; > > > > + cache-level =3D <2>; > > > > + cache-sets =3D <1024>; > > > > + cache-size =3D <2097152>; > > > > + cache-unified; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <1 2 3>; > > > > + reg =3D <0x0 0x2010000 0x0 0x1000>; > > > > + }; > > > > + > > > > + clint@2000000 { > > > > + compatible =3D "sifive,clint0"; > > > > + reg =3D <0x0 0x2000000 0x0 0xC000>; > > > > + interrupts-extended =3D <&cpu0_intc 3 &cpu0_i= ntc 7 > > > > + &cpu1_intc 3 &cpu1_in= tc 7 > > > > + &cpu2_intc 3 &cpu2_in= tc 7 > > > > + &cpu3_intc 3 &cpu3_in= tc 7 > > > > + &cpu4_intc 3 &cpu4_in= tc 7>; > > > > + }; > > > > + > > > > + plic: interrupt-controller@c000000 { > > > > + #interrupt-cells =3D <1>; > > > > + compatible =3D "sifive,plic-1.0.0"; > > > > + reg =3D <0x0 0xc000000 0x0 0x4000000>; > > > > + riscv,ndev =3D <186>; > > > > + interrupt-controller; > > > > + interrupts-extended =3D <&cpu0_intc 11 > > > > + &cpu1_intc 11 &cpu1_intc 9 > > > > + &cpu2_intc 11 &cpu2_intc 9 > > > > + &cpu3_intc 11 &cpu3_intc 9 > > > > + &cpu4_intc 11 &cpu4_intc 9>; > > > > + }; > > > > + > > > > + dma@3000000 { > > > > + compatible =3D "sifive,fu540-c000-pdma"; > > > > + reg =3D <0x0 0x3000000 0x0 0x8000>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <23 24 25 26 27 28 29 30>; > > > > + #dma-cells =3D <1>; > > > > + }; > > > > + > > > > + refclk: refclk { > > > > + compatible =3D "fixed-clock"; > > > > + #clock-cells =3D <0>; > > > > + clock-frequency =3D <600000000>; > > > > + clock-output-names =3D "msspllclk"; > > > > + }; > > > > + > > > > + clkcfg: clkcfg@20002000 { > > > > + compatible =3D "microchip,mpfs-clkcfg"; > > > > + reg =3D <0x0 0x20002000 0x0 0x1000>; > > > > + reg-names =3D "mss_sysreg"; > > > > + clocks =3D <&refclk>; > > > > + #clock-cells =3D <1>; > > > > + clock-output-names =3D "cpu", "axi", "ahb", "= envm", /* 0-3 */ > > > > + "mac0", "mac1", "mmc", "timer", = /* 4-7 */ > > > > + "mmuart0", "mmuart1", "mmuart2", "mmu= art3", /* 8-11 */ > > > > + "mmuart4", "spi0", "spi1", "i2c0", = /* 12-15 */ > > > > + "i2c1", "can0", "can1", "usb", = /* 16-19 */ > > > > + "rsvd", "rtc", "qspi", "gpio0", = /* 20-23 */ > > > > + "gpio1", "gpio2", "ddrc", "fic0", = /* 24-27 */ > > > > + "fic1", "fic2", "fic3", "athena", "cf= m"; /* 28-32 */ > > > > + }; > > > > + > > > > + serial0: serial@20000000 { > > > > + compatible =3D "ns16550a"; > > > > + reg =3D <0x0 0x20000000 0x0 0x400>; > > > > + reg-io-width =3D <4>; > > > > + reg-shift =3D <2>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <90>; > > > > + current-speed =3D <115200>; > > > > + clocks =3D <&clkcfg 8>; > > > > + status =3D "disabled"; > > > > + }; > > > > + > > > > + serial1: serial@20100000 { > > > > + compatible =3D "ns16550a"; > > > > + reg =3D <0x0 0x20100000 0x0 0x400>; > > > > + reg-io-width =3D <4>; > > > > + reg-shift =3D <2>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <91>; > > > > + current-speed =3D <115200>; > > > > + clocks =3D <&clkcfg 9>; > > > > + status =3D "disabled"; > > > > + }; > > > > + > > > > + serial2: serial@20102000 { > > > > + compatible =3D "ns16550a"; > > > > + reg =3D <0x0 0x20102000 0x0 0x400>; > > > > + reg-io-width =3D <4>; > > > > + reg-shift =3D <2>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <92>; > > > > + current-speed =3D <115200>; > > > > + clocks =3D <&clkcfg 10>; > > > > + status =3D "disabled"; > > > > + }; > > > > + > > > > + serial3: serial@20104000 { > > > > + compatible =3D "ns16550a"; > > > > + reg =3D <0x0 0x20104000 0x0 0x400>; > > > > + reg-io-width =3D <4>; > > > > + reg-shift =3D <2>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <93>; > > > > + current-speed =3D <115200>; > > > > + clocks =3D <&clkcfg 11>; > > > > + status =3D "disabled"; > > > > + }; > > > > + > > > > + emmc: mmc@20008000 { > > > > + compatible =3D "cdns,sd4hc"; > > > > + reg =3D <0x0 0x20008000 0x0 0x1000>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <88 89>; > > > > + pinctrl-names =3D "default"; > > > > + clocks =3D <&clkcfg 6>; > > > > + bus-width =3D <4>; > > > > + cap-mmc-highspeed; > > > > + mmc-ddr-3_3v; > > > > + max-frequency =3D <200000000>; > > > > + non-removable; > > > > + no-sd; > > > > + no-sdio; > > > > + voltage-ranges =3D <3300 3300>; > > > > + status =3D "disabled"; > > > > + }; > > > > + > > > > + sdcard: sdhc@20008000 { > > > > + compatible =3D "cdns,sd4hc"; > > > > + reg =3D <0x0 0x20008000 0x0 0x1000>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <88>; > > > > + pinctrl-names =3D "default"; > > > > + clocks =3D <&clkcfg 6>; > > > > + bus-width =3D <4>; > > > > + disable-wp; > > > > + cap-sd-highspeed; > > > > + card-detect-delay =3D <200>; > > > > + sd-uhs-sdr12; > > > > + sd-uhs-sdr25; > > > > + sd-uhs-sdr50; > > > > + sd-uhs-sdr104; > > > > + max-frequency =3D <200000000>; > > > > + status =3D "disabled"; > > > > + }; > > > > + > > > > + emac0: ethernet@20110000 { > > > > + compatible =3D "cdns,macb"; > > > > + reg =3D <0x0 0x20110000 0x0 0x2000>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <64 65 66 67>; > > > > + local-mac-address =3D [00 00 00 00 00 00]; > > > > + clocks =3D <&clkcfg 4>, <&clkcfg 2>; > > > > + clock-names =3D "pclk", "hclk"; > > > > + status =3D "disabled"; > > > > + #address-cells =3D <1>; > > > > + #size-cells =3D <0>; > > > > + }; > > > > + > > > > + emac1: ethernet@20112000 { > > > > + compatible =3D "cdns,macb"; > > > > + reg =3D <0x0 0x20112000 0x0 0x2000>; > > > > + interrupt-parent =3D <&plic>; > > > > + interrupts =3D <70 71 72 73>; > > > > + mac-address =3D [00 00 00 00 00 00]; > > > > + clocks =3D <&clkcfg 5>, <&clkcfg 2>; > > > > + status =3D "disabled"; > > > > + clock-names =3D "pclk", "hclk"; > > > > + #address-cells =3D <1>; > > > > + #size-cells =3D <0>; > > > > + }; > > > > + > > > > + }; > > > > +}; > > > > > > > > > > _______________________________________________ > > > linux-riscv mailing list > > > linux-riscv@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > > > -- > Regards, > Atish From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org 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X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210418_114001_082340_E6ECB2F2 X-CRM114-Status: GOOD ( 30.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org SGkgQXRpc2gsCgpPbiBTdW4sIEFwciAxOCwgMjAyMSBhdCA1OjM3IEFNIEF0aXNoIFBhdHJhIDxh dGlzaHBAYXRpc2hwYXRyYS5vcmc+IHdyb3RlOgo+Cj4gT24gTW9uLCBNYXIgMjksIDIwMjEgYXQg MTA6MDQgQU0gVml0YWx5IFdvb2wgPHZpdGFseS53b29sQGtvbnN1bGtvLmNvbT4gd3JvdGU6Cj4g Pgo+ID4gT24gU2F0LCBNYXIgMjcsIDIwMjEgYXQgNjoyNCBQTSBBbGV4IEdoaXRpIDxhbGV4QGdo aXRpLmZyPiB3cm90ZToKPiA+ID4KPiA+ID4gSGkgQXRpc2gsCj4gPiA+Cj4gPiA+IExlIDMvMy8y MSDDoCAzOjAyIFBNLCBBdGlzaCBQYXRyYSBhIMOpY3JpdCA6Cj4gPiA+ID4gQWRkIGluaXRpYWwg RFRTIGZvciBNaWNyb2NoaXAgSUNJQ0xFIGJvYXJkIGhhdmluZyBvbmx5Cj4gPiA+ID4gZXNzZW50 aWFsIGRldmljZXMgKGNsb2Nrcywgc2RoY2ksIGV0aGVybmV0LCBzZXJpYWwsIGV0YykuCj4gPiA+ ID4gVGhlIGRldmljZSB0cmVlIGlzIGJhc2VkIG9uIHRoZSBVLUJvb3QgcGF0Y2guCj4gPiA+ID4K PiA+ID4gPiBodHRwczovL3BhdGNod29yay5vemxhYnMub3JnL3Byb2plY3QvdWJvb3QvcGF0Y2gv MjAyMDExMTAxMDM0MTQuMTAxNDItNi1wYWRtYXJhby5iZWdhcmlAbWljcm9jaGlwLmNvbS8KPiA+ ID4gPgo+ID4gPiA+IFNpZ25lZC1vZmYtYnk6IEF0aXNoIFBhdHJhIDxhdGlzaC5wYXRyYUB3ZGMu Y29tPgo+ID4gPiA+IC0tLQo+ID4gPiA+ICAgYXJjaC9yaXNjdi9ib290L2R0cy9NYWtlZmlsZSAg ICAgICAgICAgICAgICAgIHwgICAxICsKPiA+ID4gPiAgIGFyY2gvcmlzY3YvYm9vdC9kdHMvbWlj cm9jaGlwL01ha2VmaWxlICAgICAgICB8ICAgMiArCj4gPiA+ID4gICAuLi4vbWljcm9jaGlwL21p Y3JvY2hpcC1tcGZzLWljaWNsZS1raXQuZHRzICAgfCAgNzIgKysrKwo+ID4gPiA+ICAgLi4uL2Jv b3QvZHRzL21pY3JvY2hpcC9taWNyb2NoaXAtbXBmcy5kdHNpICAgIHwgMzI5ICsrKysrKysrKysr KysrKysrKwo+ID4gPiA+ICAgNCBmaWxlcyBjaGFuZ2VkLCA0MDQgaW5zZXJ0aW9ucygrKQo+ID4g PiA+ICAgY3JlYXRlIG1vZGUgMTAwNjQ0IGFyY2gvcmlzY3YvYm9vdC9kdHMvbWljcm9jaGlwL01h a2VmaWxlCj4gPiA+ID4gICBjcmVhdGUgbW9kZSAxMDA2NDQgYXJjaC9yaXNjdi9ib290L2R0cy9t aWNyb2NoaXAvbWljcm9jaGlwLW1wZnMtaWNpY2xlLWtpdC5kdHMKPiA+ID4gPiAgIGNyZWF0ZSBt b2RlIDEwMDY0NCBhcmNoL3Jpc2N2L2Jvb3QvZHRzL21pY3JvY2hpcC9taWNyb2NoaXAtbXBmcy5k dHNpCj4gPiA+ID4KPiA+ID4gPiBkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9ib290L2R0cy9NYWtl ZmlsZSBiL2FyY2gvcmlzY3YvYm9vdC9kdHMvTWFrZWZpbGUKPiA+ID4gPiBpbmRleCA3ZmZkNTAy ZTNlN2IuLmZlOTk2Yjg4MzE5ZSAxMDA2NDQKPiA+ID4gPiAtLS0gYS9hcmNoL3Jpc2N2L2Jvb3Qv ZHRzL01ha2VmaWxlCj4gPiA+ID4gKysrIGIvYXJjaC9yaXNjdi9ib290L2R0cy9NYWtlZmlsZQo+ ID4gPiA+IEBAIC0xLDUgKzEsNiBAQAo+ID4gPiA+ICAgIyBTUERYLUxpY2Vuc2UtSWRlbnRpZmll cjogR1BMLTIuMAo+ID4gPiA+ICAgc3ViZGlyLXkgKz0gc2lmaXZlCj4gPiA+ID4gICBzdWJkaXIt JChDT05GSUdfU09DX0NBTkFBTl9LMjEwX0RUQl9CVUlMVElOKSArPSBjYW5hYW4KPiA+ID4gPiAr c3ViZGlyLXkgKz0gbWljcm9jaGlwCj4gPiA+ID4KPiA+ID4gPiAgIG9iai0kKENPTkZJR19CVUlM VElOX0RUQikgOj0gJChhZGRzdWZmaXggLywgJChzdWJkaXIteSkpCj4gPiA+ID4gZGlmZiAtLWdp dCBhL2FyY2gvcmlzY3YvYm9vdC9kdHMvbWljcm9jaGlwL01ha2VmaWxlIGIvYXJjaC9yaXNjdi9i b290L2R0cy9taWNyb2NoaXAvTWFrZWZpbGUKPiA+ID4gPiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+ ID4gPiA+IGluZGV4IDAwMDAwMDAwMDAwMC4uNjIyYjEyNzcxZmQzCj4gPiA+ID4gLS0tIC9kZXYv bnVsbAo+ID4gPiA+ICsrKyBiL2FyY2gvcmlzY3YvYm9vdC9kdHMvbWljcm9jaGlwL01ha2VmaWxl Cj4gPiA+ID4gQEAgLTAsMCArMSwyIEBACj4gPiA+ID4gKyMgU1BEWC1MaWNlbnNlLUlkZW50aWZp ZXI6IEdQTC0yLjAKPiA+ID4gPiArZHRiLSQoQ09ORklHX1NPQ19NSUNST0NISVBfUE9MQVJGSVJF KSArPSBtaWNyb2NoaXAtbXBmcy1pY2ljbGUta2l0LmR0Ygo+ID4gPgo+ID4gPiBJJ20gcGxheWlu ZyAob3IgdHJ5aW5nIHRvLi4uKSB3aXRoIFhJUF9LRVJORUwgYW5kIEkgaGFkIHRvIGFkZCB0aGUK PiA+ID4gZm9sbG93aW5nIHRvIGhhdmUgdGhlIGRldmljZSB0cmVlIGFjdHVhbGx5IGJ1aWx0aW4g dGhlIGtlcm5lbDoKPiA+ID4KPiA+ID4gZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3YvYm9vdC9kdHMv bWljcm9jaGlwL01ha2VmaWxlCj4gPiA+IGIvYXJjaC9yaXNjdi9ib290L2R0cy9taWNyb2NoaXAv TWFrZWZpbGUKPiA+ID4gaW5kZXggNjIyYjEyNzcxZmQzLi44NTVjMTUwMmQ5MTIgMTAwNjQ0Cj4g PiA+IC0tLSBhL2FyY2gvcmlzY3YvYm9vdC9kdHMvbWljcm9jaGlwL01ha2VmaWxlCj4gPiA+ICsr KyBiL2FyY2gvcmlzY3YvYm9vdC9kdHMvbWljcm9jaGlwL01ha2VmaWxlCj4gPiA+IEBAIC0xLDIg KzEsMyBAQAo+ID4gPiAgICMgU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0yLjAKPiA+ID4g ICBkdGItJChDT05GSUdfU09DX01JQ1JPQ0hJUF9QT0xBUkZJUkUpICs9IG1pY3JvY2hpcC1tcGZz LWljaWNsZS1raXQuZHRiCj4gPiA+ICtvYmotJChDT05GSUdfQlVJTFRJTl9EVEIpICs9ICQoYWRk c3VmZml4IC5vLCAkKGR0Yi15KSkKPiA+ID4KPiA+ID4gQWxleAo+ID4KPiA+IFllcywgSSBiZWxp ZXZlIHRoaXMgaXMgbmVjZXNzYXJ5IGZvciBCVUlMVElOX0RUQiB0byB3b3JrIG9uIFBvbGFyZmly ZSwKPiA+IHJlZ2FyZGxlc3Mgb2Ygd2hldGhlciB0aGUga2VybmVsIGlzIFhJUCBvciBub3QuCj4g Pgo+Cj4gQnV0IHRoZXJlIGlzIG5vIHVzZWNhc2UgZm9yIEJVSUxUSU5fRFRCIGZvciBwb2xhcmZp cmUgZXhjZXB0IFhJUCBrZXJuZWwuCj4gVGhlIGJvb3Rsb2FkZXJzIGZvciBwb2xhcmZpcmUgaXMg Y2FwYWJsZSBvZiBwcm92aWRpbmcgYSBEVEIgdG8ga2VybmVsLgoKSSBoYXZlIGhhcmQgdGltZSBz ZWVpbmcgYW4gaW5kdXN0cmlhbCBhcHBsaWNhdGlvbiB3aXRoIGEgYm9vdGxvYWRlcgptb3VudGlu ZyBhIHZmYXQgcGFydGl0aW9uIHRvIGxvYWQgYSBkZXZpY2UgdHJlZSBmaWxlLiBTbyB0aGVyZSBo YXMgdG8KYmUgYSBsZXNzIG9ic2N1cmUgYW5kIGxlc3MgdGltZSBjb25zdW1pbmcgYWx0ZXJuYXRp dmUuIEFuZCBpZiB0aGUKbWFpbmxpbmUga2VybmVsIGRvZXNuJ3QgcHJvdmlkZSBpdCAoZS4gZy4g aW4gdGhlIGZvcm0gb2Ygc3VwcG9ydCBmb3IKQlVJTFRJTl9EVEIpIGl0IG9wZW5zIHVwIGZvciBl cnJvciBwcm9uZSBjdXN0b20gc29sdXRpb25zIGZyb20gdmFyaW91cwp2ZW5kb3JzLiBJcyB0aGF0 IHJlYWxseSB3aGF0IHdlIHdhbnQ/CgpCZXN0IHJlZ2FyZHMsCiAgIFZpdGFseQoKPiBJZiBYSVAg a2VybmVsIGlzIGVuYWJsZWQsIHRoZSBmb2xsb3dpbmcgbGluZSBpbgo+IGFyY2gvcmlzY3YvYm9v dC9kdHMvTWFrZWZpbGUgc2hvdWxkIHRha2UgY2FyZSBvZiB0aGluZ3MKPgo+Cj4gPiBCZXN0IHJl Z2FyZHMsCj4gPiAgICBWaXRhbHkKPiA+Cj4gPiA+ID4gZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3Yv Ym9vdC9kdHMvbWljcm9jaGlwL21pY3JvY2hpcC1tcGZzLWljaWNsZS1raXQuZHRzIGIvYXJjaC9y aXNjdi9ib290L2R0cy9taWNyb2NoaXAvbWljcm9jaGlwLW1wZnMtaWNpY2xlLWtpdC5kdHMKPiA+ ID4gPiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+ID4gPiA+IGluZGV4IDAwMDAwMDAwMDAwMC4uZWM3 OTk0NDA2NWM5Cj4gPiA+ID4gLS0tIC9kZXYvbnVsbAo+ID4gPiA+ICsrKyBiL2FyY2gvcmlzY3Yv Ym9vdC9kdHMvbWljcm9jaGlwL21pY3JvY2hpcC1tcGZzLWljaWNsZS1raXQuZHRzCj4gPiA+ID4g QEAgLTAsMCArMSw3MiBAQAo+ID4gPiA+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogKEdQ TC0yLjAgT1IgTUlUKQo+ID4gPiA+ICsvKiBDb3B5cmlnaHQgKGMpIDIwMjAgTWljcm9jaGlwIFRl Y2hub2xvZ3kgSW5jICovCj4gPiA+ID4gKwo+ID4gPiA+ICsvZHRzLXYxLzsKPiA+ID4gPiArCj4g PiA+ID4gKyNpbmNsdWRlICJtaWNyb2NoaXAtbXBmcy5kdHNpIgo+ID4gPiA+ICsKPiA+ID4gPiAr LyogQ2xvY2sgZnJlcXVlbmN5IChpbiBIeikgb2YgdGhlIHJ0Y2NsayAqLwo+ID4gPiA+ICsjZGVm aW5lIFJUQ0NMS19GUkVRICAgICAgICAgIDEwMDAwMDAKPiA+ID4gPiArCj4gPiA+ID4gKy8gewo+ ID4gPiA+ICsgICAgICNhZGRyZXNzLWNlbGxzID0gPDI+Owo+ID4gPiA+ICsgICAgICNzaXplLWNl bGxzID0gPDI+Owo+ID4gPiA+ICsgICAgIG1vZGVsID0gIk1pY3JvY2hpcCBQb2xhckZpcmUtU29D IEljaWNsZSBLaXQiOwo+ID4gPiA+ICsgICAgIGNvbXBhdGlibGUgPSAibWljcm9jaGlwLG1wZnMt aWNpY2xlLWtpdCI7Cj4gPiA+ID4gKwo+ID4gPiA+ICsgICAgIGNob3NlbiB7Cj4gPiA+ID4gKyAg ICAgICAgICAgICBzdGRvdXQtcGF0aCA9ICZzZXJpYWwwOwo+ID4gPiA+ICsgICAgIH07Cj4gPiA+ ID4gKwo+ID4gPiA+ICsgICAgIGNwdXMgewo+ID4gPiA+ICsgICAgICAgICAgICAgdGltZWJhc2Ut ZnJlcXVlbmN5ID0gPFJUQ0NMS19GUkVRPjsKPiA+ID4gPiArICAgICB9Owo+ID4gPiA+ICsKPiA+ ID4gPiArICAgICBtZW1vcnlAODAwMDAwMDAgewo+ID4gPiA+ICsgICAgICAgICAgICAgZGV2aWNl X3R5cGUgPSAibWVtb3J5IjsKPiA+ID4gPiArICAgICAgICAgICAgIHJlZyA9IDwweDAgMHg4MDAw MDAwMCAweDAgMHg0MDAwMDAwMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICBjbG9ja3MgPSA8JmNs a2NmZyAyNj47Cj4gPiA+ID4gKyAgICAgfTsKPiA+ID4gPiArCj4gPiA+ID4gKyAgICAgc29jIHsK PiA+ID4gPiArICAgICB9Owo+ID4gPiA+ICt9Owo+ID4gPiA+ICsKPiA+ID4gPiArJnNlcmlhbDAg ewo+ID4gPiA+ICsgICAgIHN0YXR1cyA9ICJva2F5IjsKPiA+ID4gPiArfTsKPiA+ID4gPiArCj4g PiA+ID4gKyZzZXJpYWwxIHsKPiA+ID4gPiArICAgICBzdGF0dXMgPSAib2theSI7Cj4gPiA+ID4g K307Cj4gPiA+ID4gKwo+ID4gPiA+ICsmc2VyaWFsMiB7Cj4gPiA+ID4gKyAgICAgc3RhdHVzID0g Im9rYXkiOwo+ID4gPiA+ICt9Owo+ID4gPiA+ICsKPiA+ID4gPiArJnNlcmlhbDMgewo+ID4gPiA+ ICsgICAgIHN0YXR1cyA9ICJva2F5IjsKPiA+ID4gPiArfTsKPiA+ID4gPiArCj4gPiA+ID4gKyZz ZGNhcmQgewo+ID4gPiA+ICsgICAgIHN0YXR1cyA9ICJva2F5IjsKPiA+ID4gPiArfTsKPiA+ID4g PiArCj4gPiA+ID4gKyZlbWFjMCB7Cj4gPiA+ID4gKyAgICAgcGh5LW1vZGUgPSAic2dtaWkiOwo+ ID4gPiA+ICsgICAgIHBoeS1oYW5kbGUgPSA8JnBoeTA+Owo+ID4gPiA+ICsgICAgIHBoeTA6IGV0 aGVybmV0LXBoeUA4IHsKPiA+ID4gPiArICAgICAgICAgICAgIHJlZyA9IDw4PjsKPiA+ID4gPiAr ICAgICAgICAgICAgIHRpLGZpZm8tZGVwdGggPSA8MHgwMT47Cj4gPiA+ID4gKyAgICAgfTsKPiA+ ID4gPiArfTsKPiA+ID4gPiArCj4gPiA+ID4gKyZlbWFjMSB7Cj4gPiA+ID4gKyAgICAgc3RhdHVz ID0gIm9rYXkiOwo+ID4gPiA+ICsgICAgIHBoeS1tb2RlID0gInNnbWlpIjsKPiA+ID4gPiArICAg ICBwaHktaGFuZGxlID0gPCZwaHkxPjsKPiA+ID4gPiArICAgICBwaHkxOiBldGhlcm5ldC1waHlA OSB7Cj4gPiA+ID4gKyAgICAgICAgICAgICByZWcgPSA8OT47Cj4gPiA+ID4gKyAgICAgICAgICAg ICB0aSxmaWZvLWRlcHRoID0gPDB4MDE+Owo+ID4gPiA+ICsgICAgIH07Cj4gPiA+ID4gK307Cj4g PiA+ID4gZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3YvYm9vdC9kdHMvbWljcm9jaGlwL21pY3JvY2hp cC1tcGZzLmR0c2kgYi9hcmNoL3Jpc2N2L2Jvb3QvZHRzL21pY3JvY2hpcC9taWNyb2NoaXAtbXBm cy5kdHNpCj4gPiA+ID4gbmV3IGZpbGUgbW9kZSAxMDA2NDQKPiA+ID4gPiBpbmRleCAwMDAwMDAw MDAwMDAuLmI5ODE5NTcwYTdkMQo+ID4gPiA+IC0tLSAvZGV2L251bGwKPiA+ID4gPiArKysgYi9h cmNoL3Jpc2N2L2Jvb3QvZHRzL21pY3JvY2hpcC9taWNyb2NoaXAtbXBmcy5kdHNpCj4gPiA+ID4g QEAgLTAsMCArMSwzMjkgQEAKPiA+ID4gPiArLy8gU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IChH UEwtMi4wIE9SIE1JVCkKPiA+ID4gPiArLyogQ29weXJpZ2h0IChjKSAyMDIwIE1pY3JvY2hpcCBU ZWNobm9sb2d5IEluYyAqLwo+ID4gPiA+ICsKPiA+ID4gPiArL2R0cy12MS87Cj4gPiA+ID4gKwo+ ID4gPiA+ICsvIHsKPiA+ID4gPiArICAgICAjYWRkcmVzcy1jZWxscyA9IDwyPjsKPiA+ID4gPiAr ICAgICAjc2l6ZS1jZWxscyA9IDwyPjsKPiA+ID4gPiArICAgICBtb2RlbCA9ICJNaWNyb2NoaXAg TVBGUyBJY2ljbGUgS2l0IjsKPiA+ID4gPiArICAgICBjb21wYXRpYmxlID0gIm1pY3JvY2hpcCxt cGZzLWljaWNsZS1raXQiOwo+ID4gPiA+ICsKPiA+ID4gPiArICAgICBjaG9zZW4gewo+ID4gPiA+ ICsgICAgIH07Cj4gPiA+ID4gKwo+ID4gPiA+ICsgICAgIGNwdXMgewo+ID4gPiA+ICsgICAgICAg ICAgICAgI2FkZHJlc3MtY2VsbHMgPSA8MT47Cj4gPiA+ID4gKyAgICAgICAgICAgICAjc2l6ZS1j ZWxscyA9IDwwPjsKPiA+ID4gPiArCj4gPiA+ID4gKyAgICAgICAgICAgICBjcHVAMCB7Cj4gPiA+ ID4gKyAgICAgICAgICAgICAgICAgICAgIGNsb2NrLWZyZXF1ZW5jeSA9IDwwPjsKPiA+ID4gPiAr ICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJsZSA9ICJzaWZpdmUsZTUxIiwgInNpZml2ZSxy b2NrZXQwIiwgInJpc2N2IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgZGV2aWNlX3R5 cGUgPSAiY3B1IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1ibG9jay1z aXplID0gPDY0PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1zZXRzID0g PDEyOD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGktY2FjaGUtc2l6ZSA9IDwxNjM4 ND47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJlZyA9IDwwPjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgcmlzY3YsaXNhID0gInJ2NjRpbWFjIjsKPiA+ID4gPiArICAgICAg ICAgICAgICAgICAgICAgc3RhdHVzID0gImRpc2FibGVkIjsKPiA+ID4gPiArCj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIGNwdTBfaW50YzogaW50ZXJydXB0LWNvbnRyb2xsZXIgewo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJsZSA9ICJyaXNj dixjcHUtaW50YyI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgaW50ZXJy dXB0LWNvbnRyb2xsZXI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIH07Cj4gPiA+ID4g KyAgICAgICAgICAgICB9Owo+ID4gPiA+ICsKPiA+ID4gPiArICAgICAgICAgICAgIGNwdUAxIHsK PiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2xvY2stZnJlcXVlbmN5ID0gPDA+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gInNpZml2ZSx1NTQtbWMiLCAi c2lmaXZlLHJvY2tldDAiLCAicmlzY3YiOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBk LWNhY2hlLWJsb2NrLXNpemUgPSA8NjQ+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBk LWNhY2hlLXNldHMgPSA8NjQ+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkLWNhY2hl LXNpemUgPSA8MzI3Njg+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkLXRsYi1zZXRz ID0gPDE+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkLXRsYi1zaXplID0gPDMyPjsK PiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgZGV2aWNlX3R5cGUgPSAiY3B1IjsKPiA+ID4g PiArICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1ibG9jay1zaXplID0gPDY0PjsKPiA+ID4g PiArICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1zZXRzID0gPDY0PjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgaS1jYWNoZS1zaXplID0gPDMyNzY4PjsKPiA+ID4gPiArICAgICAg ICAgICAgICAgICAgICAgaS10bGItc2V0cyA9IDwxPjsKPiA+ID4gPiArICAgICAgICAgICAgICAg ICAgICAgaS10bGItc2l6ZSA9IDwzMj47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIG1t dS10eXBlID0gInJpc2N2LHN2MzkiOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICByZWcg PSA8MT47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJpc2N2LGlzYSA9ICJydjY0aW1h ZmRjIjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgdGxiLXNwbGl0Owo+ID4gPiA+ICsg ICAgICAgICAgICAgICAgICAgICBzdGF0dXMgPSAib2theSI7Cj4gPiA+ID4gKwo+ID4gPiA+ICsg ICAgICAgICAgICAgICAgICAgICBjcHUxX2ludGM6IGludGVycnVwdC1jb250cm9sbGVyIHsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAjaW50ZXJydXB0LWNlbGxzID0gPDE+ Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAicmlz Y3YsY3B1LWludGMiOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGludGVy cnVwdC1jb250cm9sbGVyOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICB9Owo+ID4gPiA+ ICsgICAgICAgICAgICAgfTsKPiA+ID4gPiArCj4gPiA+ID4gKyAgICAgICAgICAgICBjcHVAMiB7 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNsb2NrLWZyZXF1ZW5jeSA9IDwwPjsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJsZSA9ICJzaWZpdmUsdTU0LW1jIiwg InNpZml2ZSxyb2NrZXQwIiwgInJpc2N2IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAg ZC1jYWNoZS1ibG9jay1zaXplID0gPDY0PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAg ZC1jYWNoZS1zZXRzID0gPDY0PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgZC1jYWNo ZS1zaXplID0gPDMyNzY4PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgZC10bGItc2V0 cyA9IDwxPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgZC10bGItc2l6ZSA9IDwzMj47 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGRldmljZV90eXBlID0gImNwdSI7Cj4gPiA+ ID4gKyAgICAgICAgICAgICAgICAgICAgIGktY2FjaGUtYmxvY2stc2l6ZSA9IDw2ND47Cj4gPiA+ ID4gKyAgICAgICAgICAgICAgICAgICAgIGktY2FjaGUtc2V0cyA9IDw2ND47Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIGktY2FjaGUtc2l6ZSA9IDwzMjc2OD47Cj4gPiA+ID4gKyAgICAg ICAgICAgICAgICAgICAgIGktdGxiLXNldHMgPSA8MT47Cj4gPiA+ID4gKyAgICAgICAgICAgICAg ICAgICAgIGktdGxiLXNpemUgPSA8MzI+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBt bXUtdHlwZSA9ICJyaXNjdixzdjM5IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVn ID0gPDI+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICByaXNjdixpc2EgPSAicnY2NGlt YWZkYyI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHRsYi1zcGxpdDsKPiA+ID4gPiAr ICAgICAgICAgICAgICAgICAgICAgc3RhdHVzID0gIm9rYXkiOwo+ID4gPiA+ICsKPiA+ID4gPiAr ICAgICAgICAgICAgICAgICAgICAgY3B1Ml9pbnRjOiBpbnRlcnJ1cHQtY29udHJvbGxlciB7Cj4g PiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgI2ludGVycnVwdC1jZWxscyA9IDwx PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gInJp c2N2LGNwdS1pbnRjIjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICBpbnRl cnJ1cHQtY29udHJvbGxlcjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgfTsKPiA+ID4g PiArICAgICAgICAgICAgIH07Cj4gPiA+ID4gKwo+ID4gPiA+ICsgICAgICAgICAgICAgY3B1QDMg ewo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBjbG9jay1mcmVxdWVuY3kgPSA8MD47Cj4g PiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAic2lmaXZlLHU1NC1tYyIs ICJzaWZpdmUscm9ja2V0MCIsICJyaXNjdiI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAg IGQtY2FjaGUtYmxvY2stc2l6ZSA9IDw2ND47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAg IGQtY2FjaGUtc2V0cyA9IDw2ND47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGQtY2Fj aGUtc2l6ZSA9IDwzMjc2OD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGQtdGxiLXNl dHMgPSA8MT47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGQtdGxiLXNpemUgPSA8MzI+ Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkZXZpY2VfdHlwZSA9ICJjcHUiOwo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBpLWNhY2hlLWJsb2NrLXNpemUgPSA8NjQ+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBpLWNhY2hlLXNldHMgPSA8NjQ+Owo+ID4gPiA+ICsg ICAgICAgICAgICAgICAgICAgICBpLWNhY2hlLXNpemUgPSA8MzI3Njg+Owo+ID4gPiA+ICsgICAg ICAgICAgICAgICAgICAgICBpLXRsYi1zZXRzID0gPDE+Owo+ID4gPiA+ICsgICAgICAgICAgICAg ICAgICAgICBpLXRsYi1zaXplID0gPDMyPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAg bW11LXR5cGUgPSAicmlzY3Ysc3YzOSI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJl ZyA9IDwzPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmlzY3YsaXNhID0gInJ2NjRp bWFmZGMiOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICB0bGItc3BsaXQ7Cj4gPiA+ID4g KyAgICAgICAgICAgICAgICAgICAgIHN0YXR1cyA9ICJva2F5IjsKPiA+ID4gPiArCj4gPiA+ID4g KyAgICAgICAgICAgICAgICAgICAgIGNwdTNfaW50YzogaW50ZXJydXB0LWNvbnRyb2xsZXIgewo+ ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICNpbnRlcnJ1cHQtY2VsbHMgPSA8 MT47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJsZSA9ICJy aXNjdixjcHUtaW50YyI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgaW50 ZXJydXB0LWNvbnRyb2xsZXI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIH07Cj4gPiA+ ID4gKyAgICAgICAgICAgICB9Owo+ID4gPiA+ICsKPiA+ID4gPiArICAgICAgICAgICAgIGNwdUA0 IHsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2xvY2stZnJlcXVlbmN5ID0gPDA+Owo+ ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gInNpZml2ZSx1NTQtbWMi LCAic2lmaXZlLHJvY2tldDAiLCAicmlzY3YiOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAg ICBkLWNhY2hlLWJsb2NrLXNpemUgPSA8NjQ+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAg ICBkLWNhY2hlLXNldHMgPSA8NjQ+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkLWNh Y2hlLXNpemUgPSA8MzI3Njg+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkLXRsYi1z ZXRzID0gPDE+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBkLXRsYi1zaXplID0gPDMy PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgZGV2aWNlX3R5cGUgPSAiY3B1IjsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1ibG9jay1zaXplID0gPDY0PjsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1zZXRzID0gPDY0PjsKPiA+ID4gPiAr ICAgICAgICAgICAgICAgICAgICAgaS1jYWNoZS1zaXplID0gPDMyNzY4PjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgaS10bGItc2V0cyA9IDwxPjsKPiA+ID4gPiArICAgICAgICAgICAg ICAgICAgICAgaS10bGItc2l6ZSA9IDwzMj47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAg IG1tdS10eXBlID0gInJpc2N2LHN2MzkiOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBy ZWcgPSA8ND47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJpc2N2LGlzYSA9ICJydjY0 aW1hZmRjIjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgdGxiLXNwbGl0Owo+ID4gPiA+ ICsgICAgICAgICAgICAgICAgICAgICBzdGF0dXMgPSAib2theSI7Cj4gPiA+ID4gKyAgICAgICAg ICAgICAgICAgICAgIGNwdTRfaW50YzogaW50ZXJydXB0LWNvbnRyb2xsZXIgewo+ID4gPiA+ICsg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47Cj4gPiA+ ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJsZSA9ICJyaXNjdixjcHUt aW50YyI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgaW50ZXJydXB0LWNv bnRyb2xsZXI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIH07Cj4gPiA+ID4gKyAgICAg ICAgICAgICB9Owo+ID4gPiA+ICsgICAgIH07Cj4gPiA+ID4gKwo+ID4gPiA+ICsgICAgIHNvYyB7 Cj4gPiA+ID4gKyAgICAgICAgICAgICAjYWRkcmVzcy1jZWxscyA9IDwyPjsKPiA+ID4gPiArICAg ICAgICAgICAgICNzaXplLWNlbGxzID0gPDI+Owo+ID4gPiA+ICsgICAgICAgICAgICAgY29tcGF0 aWJsZSA9ICJzaW1wbGUtYnVzIjsKPiA+ID4gPiArICAgICAgICAgICAgIHJhbmdlczsKPiA+ID4g PiArCj4gPiA+ID4gKyAgICAgICAgICAgICBjYWNoZS1jb250cm9sbGVyQDIwMTAwMDAgewo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gInNpZml2ZSxmdTU0MC1jMDAw LWNjYWNoZSIsICJjYWNoZSI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNhY2hlLWJs b2NrLXNpemUgPSA8NjQ+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBjYWNoZS1sZXZl bCA9IDwyPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2FjaGUtc2V0cyA9IDwxMDI0 PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2FjaGUtc2l6ZSA9IDwyMDk3MTUyPjsK PiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2FjaGUtdW5pZmllZDsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgaW50ZXJydXB0LXBhcmVudCA9IDwmcGxpYz47Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIGludGVycnVwdHMgPSA8MSAyIDM+Owo+ID4gPiA+ICsgICAgICAg ICAgICAgICAgICAgICByZWcgPSA8MHgwIDB4MjAxMDAwMCAweDAgMHgxMDAwPjsKPiA+ID4gPiAr ICAgICAgICAgICAgIH07Cj4gPiA+ID4gKwo+ID4gPiA+ICsgICAgICAgICAgICAgY2xpbnRAMjAw MDAwMCB7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAic2lmaXZl LGNsaW50MCI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJlZyA9IDwweDAgMHgyMDAw MDAwIDB4MCAweEMwMDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBpbnRlcnJ1cHRz LWV4dGVuZGVkID0gPCZjcHUwX2ludGMgMyAmY3B1MF9pbnRjIDcKPiA+ID4gPiArICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgJmNwdTFfaW50YyAzICZjcHUxX2lu dGMgNwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAmY3B1Ml9pbnRjIDMgJmNwdTJfaW50YyA3Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICZjcHUzX2ludGMgMyAmY3B1M19pbnRjIDcKPiA+ID4g PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgJmNwdTRfaW50 YyAzICZjcHU0X2ludGMgNz47Cj4gPiA+ID4gKyAgICAgICAgICAgICB9Owo+ID4gPiA+ICsKPiA+ ID4gPiArICAgICAgICAgICAgIHBsaWM6IGludGVycnVwdC1jb250cm9sbGVyQGMwMDAwMDAgewo+ ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAjaW50ZXJydXB0LWNlbGxzID0gPDE+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gInNpZml2ZSxwbGljLTEuMC4w IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVnID0gPDB4MCAweGMwMDAwMDAgMHgw IDB4NDAwMDAwMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJpc2N2LG5kZXYgPSA8 MTg2PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgaW50ZXJydXB0LWNvbnRyb2xsZXI7 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGludGVycnVwdHMtZXh0ZW5kZWQgPSA8JmNw dTBfaW50YyAxMQo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg JmNwdTFfaW50YyAxMSAmY3B1MV9pbnRjIDkKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICZjcHUyX2ludGMgMTEgJmNwdTJfaW50YyA5Cj4gPiA+ID4gKyAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAmY3B1M19pbnRjIDExICZjcHUzX2ludGMg OQo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgJmNwdTRfaW50 YyAxMSAmY3B1NF9pbnRjIDk+Owo+ID4gPiA+ICsgICAgICAgICAgICAgfTsKPiA+ID4gPiArCj4g PiA+ID4gKyAgICAgICAgICAgICBkbWFAMzAwMDAwMCB7Cj4gPiA+ID4gKyAgICAgICAgICAgICAg ICAgICAgIGNvbXBhdGlibGUgPSAic2lmaXZlLGZ1NTQwLWMwMDAtcGRtYSI7Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIHJlZyA9IDwweDAgMHgzMDAwMDAwIDB4MCAweDgwMDA+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBpbnRlcnJ1cHQtcGFyZW50ID0gPCZwbGljPjsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgaW50ZXJydXB0cyA9IDwyMyAyNCAyNSAyNiAyNyAy OCAyOSAzMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICNkbWEtY2VsbHMgPSA8MT47 Cj4gPiA+ID4gKyAgICAgICAgICAgICB9Owo+ID4gPiA+ICsKPiA+ID4gPiArICAgICAgICAgICAg IHJlZmNsazogcmVmY2xrIHsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJs ZSA9ICJmaXhlZC1jbG9jayI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICNjbG9jay1j ZWxscyA9IDwwPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2xvY2stZnJlcXVlbmN5 ID0gPDYwMDAwMDAwMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNsb2NrLW91dHB1 dC1uYW1lcyA9ICJtc3NwbGxjbGsiOwo+ID4gPiA+ICsgICAgICAgICAgICAgfTsKPiA+ID4gPiAr Cj4gPiA+ID4gKyAgICAgICAgICAgICBjbGtjZmc6IGNsa2NmZ0AyMDAwMjAwMCB7Cj4gPiA+ID4g KyAgICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAibWljcm9jaGlwLG1wZnMtY2xrY2Zn IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVnID0gPDB4MCAweDIwMDAyMDAwIDB4 MCAweDEwMDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICByZWctbmFtZXMgPSAibXNz X3N5c3JlZyI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNsb2NrcyA9IDwmcmVmY2xr PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgI2Nsb2NrLWNlbGxzID0gPDE+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBjbG9jay1vdXRwdXQtbmFtZXMgPSAiY3B1IiwgImF4 aSIsICJhaGIiLCAiZW52bSIsICAgICAgIC8qIDAtMyAgICovCj4gPiA+ID4gKyAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICJtYWMwIiwgIm1hYzEiLCAibW1jIiwgInRpbWVyIiwgICAgICAg ICAgICAgICAgLyogNC03ICAgKi8KPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAibW11YXJ0MCIsICJtbXVhcnQxIiwgIm1tdWFydDIiLCAibW11YXJ0MyIsICAgICAvKiA4LTEx ICAqLwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICJtbXVhcnQ0IiwgInNw aTAiLCAic3BpMSIsICJpMmMwIiwgICAgICAgICAgICAgIC8qIDEyLTE1ICovCj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgImkyYzEiLCAiY2FuMCIsICJjYW4xIiwgInVzYiIs ICAgICAgICAgICAgICAgICAgLyogMTYtMTkgKi8KPiA+ID4gPiArICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAicnN2ZCIsICJydGMiLCAicXNwaSIsICJncGlvMCIsICAgICAgICAgICAgICAg ICAvKiAyMC0yMyAqLwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICJncGlv MSIsICJncGlvMiIsICJkZHJjIiwgImZpYzAiLCAgICAgICAgICAgICAgIC8qIDI0LTI3ICovCj4g PiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgImZpYzEiLCAiZmljMiIsICJmaWMz IiwgImF0aGVuYSIsICJjZm0iOyAgICAgICAgLyogMjgtMzIgKi8KPiA+ID4gPiArICAgICAgICAg ICAgIH07Cj4gPiA+ID4gKwo+ID4gPiA+ICsgICAgICAgICAgICAgc2VyaWFsMDogc2VyaWFsQDIw MDAwMDAwIHsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY29tcGF0aWJsZSA9ICJuczE2 NTUwYSI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJlZyA9IDwweDAgMHgyMDAwMDAw MCAweDAgMHg0MDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICByZWctaW8td2lkdGgg PSA8ND47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJlZy1zaGlmdCA9IDwyPjsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgaW50ZXJydXB0LXBhcmVudCA9IDwmcGxpYz47Cj4g PiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGludGVycnVwdHMgPSA8OTA+Owo+ID4gPiA+ICsg ICAgICAgICAgICAgICAgICAgICBjdXJyZW50LXNwZWVkID0gPDExNTIwMD47Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIGNsb2NrcyA9IDwmY2xrY2ZnIDg+Owo+ID4gPiA+ICsgICAgICAg ICAgICAgICAgICAgICBzdGF0dXMgPSAiZGlzYWJsZWQiOwo+ID4gPiA+ICsgICAgICAgICAgICAg fTsKPiA+ID4gPiArCj4gPiA+ID4gKyAgICAgICAgICAgICBzZXJpYWwxOiBzZXJpYWxAMjAxMDAw MDAgewo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gIm5zMTY1NTBh IjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVnID0gPDB4MCAweDIwMTAwMDAwIDB4 MCAweDQwMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJlZy1pby13aWR0aCA9IDw0 PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVnLXNoaWZ0ID0gPDI+Owo+ID4gPiA+ ICsgICAgICAgICAgICAgICAgICAgICBpbnRlcnJ1cHQtcGFyZW50ID0gPCZwbGljPjsKPiA+ID4g PiArICAgICAgICAgICAgICAgICAgICAgaW50ZXJydXB0cyA9IDw5MT47Cj4gPiA+ID4gKyAgICAg ICAgICAgICAgICAgICAgIGN1cnJlbnQtc3BlZWQgPSA8MTE1MjAwPjsKPiA+ID4gPiArICAgICAg ICAgICAgICAgICAgICAgY2xvY2tzID0gPCZjbGtjZmcgOT47Cj4gPiA+ID4gKyAgICAgICAgICAg ICAgICAgICAgIHN0YXR1cyA9ICJkaXNhYmxlZCI7Cj4gPiA+ID4gKyAgICAgICAgICAgICB9Owo+ ID4gPiA+ICsKPiA+ID4gPiArICAgICAgICAgICAgIHNlcmlhbDI6IHNlcmlhbEAyMDEwMjAwMCB7 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAibnMxNjU1MGEiOwo+ ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICByZWcgPSA8MHgwIDB4MjAxMDIwMDAgMHgwIDB4 NDAwPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVnLWlvLXdpZHRoID0gPDQ+Owo+ ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICByZWctc2hpZnQgPSA8Mj47Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIGludGVycnVwdC1wYXJlbnQgPSA8JnBsaWM+Owo+ID4gPiA+ICsg ICAgICAgICAgICAgICAgICAgICBpbnRlcnJ1cHRzID0gPDkyPjsKPiA+ID4gPiArICAgICAgICAg ICAgICAgICAgICAgY3VycmVudC1zcGVlZCA9IDwxMTUyMDA+Owo+ID4gPiA+ICsgICAgICAgICAg ICAgICAgICAgICBjbG9ja3MgPSA8JmNsa2NmZyAxMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAg ICAgICAgIHN0YXR1cyA9ICJkaXNhYmxlZCI7Cj4gPiA+ID4gKyAgICAgICAgICAgICB9Owo+ID4g PiA+ICsKPiA+ID4gPiArICAgICAgICAgICAgIHNlcmlhbDM6IHNlcmlhbEAyMDEwNDAwMCB7Cj4g PiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAibnMxNjU1MGEiOwo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICByZWcgPSA8MHgwIDB4MjAxMDQwMDAgMHgwIDB4NDAw PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgcmVnLWlvLXdpZHRoID0gPDQ+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICByZWctc2hpZnQgPSA8Mj47Cj4gPiA+ID4gKyAgICAg ICAgICAgICAgICAgICAgIGludGVycnVwdC1wYXJlbnQgPSA8JnBsaWM+Owo+ID4gPiA+ICsgICAg ICAgICAgICAgICAgICAgICBpbnRlcnJ1cHRzID0gPDkzPjsKPiA+ID4gPiArICAgICAgICAgICAg ICAgICAgICAgY3VycmVudC1zcGVlZCA9IDwxMTUyMDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAg ICAgICAgICBjbG9ja3MgPSA8JmNsa2NmZyAxMT47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAg ICAgIHN0YXR1cyA9ICJkaXNhYmxlZCI7Cj4gPiA+ID4gKyAgICAgICAgICAgICB9Owo+ID4gPiA+ ICsKPiA+ID4gPiArICAgICAgICAgICAgIGVtbWM6IG1tY0AyMDAwODAwMCB7Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIGNvbXBhdGlibGUgPSAiY2RucyxzZDRoYyI7Cj4gPiA+ID4gKyAg ICAgICAgICAgICAgICAgICAgIHJlZyA9IDwweDAgMHgyMDAwODAwMCAweDAgMHgxMDAwPjsKPiA+ ID4gPiArICAgICAgICAgICAgICAgICAgICAgaW50ZXJydXB0LXBhcmVudCA9IDwmcGxpYz47Cj4g PiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGludGVycnVwdHMgPSA8ODggODk+Owo+ID4gPiA+ ICsgICAgICAgICAgICAgICAgICAgICBwaW5jdHJsLW5hbWVzID0gImRlZmF1bHQiOwo+ID4gPiA+ ICsgICAgICAgICAgICAgICAgICAgICBjbG9ja3MgPSA8JmNsa2NmZyA2PjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgYnVzLXdpZHRoID0gPDQ+Owo+ID4gPiA+ICsgICAgICAgICAgICAg ICAgICAgICBjYXAtbW1jLWhpZ2hzcGVlZDsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAg bW1jLWRkci0zXzN2Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBtYXgtZnJlcXVlbmN5 ID0gPDIwMDAwMDAwMD47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIG5vbi1yZW1vdmFi bGU7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIG5vLXNkOwo+ID4gPiA+ICsgICAgICAg ICAgICAgICAgICAgICBuby1zZGlvOwo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICB2b2x0 YWdlLXJhbmdlcyA9IDwzMzAwIDMzMDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBz dGF0dXMgPSAiZGlzYWJsZWQiOwo+ID4gPiA+ICsgICAgICAgICAgICAgfTsKPiA+ID4gPiArCj4g PiA+ID4gKyAgICAgICAgICAgICBzZGNhcmQ6IHNkaGNAMjAwMDgwMDAgewo+ID4gPiA+ICsgICAg ICAgICAgICAgICAgICAgICBjb21wYXRpYmxlID0gImNkbnMsc2Q0aGMiOwo+ID4gPiA+ICsgICAg ICAgICAgICAgICAgICAgICByZWcgPSA8MHgwIDB4MjAwMDgwMDAgMHgwIDB4MTAwMD47Cj4gPiA+ ID4gKyAgICAgICAgICAgICAgICAgICAgIGludGVycnVwdC1wYXJlbnQgPSA8JnBsaWM+Owo+ID4g PiA+ICsgICAgICAgICAgICAgICAgICAgICBpbnRlcnJ1cHRzID0gPDg4PjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgcGluY3RybC1uYW1lcyA9ICJkZWZhdWx0IjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgY2xvY2tzID0gPCZjbGtjZmcgNj47Cj4gPiA+ID4gKyAgICAgICAg ICAgICAgICAgICAgIGJ1cy13aWR0aCA9IDw0PjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAg ICAgZGlzYWJsZS13cDsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2FwLXNkLWhpZ2hz cGVlZDsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2FyZC1kZXRlY3QtZGVsYXkgPSA8 MjAwPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgc2QtdWhzLXNkcjEyOwo+ID4gPiA+ ICsgICAgICAgICAgICAgICAgICAgICBzZC11aHMtc2RyMjU7Cj4gPiA+ID4gKyAgICAgICAgICAg ICAgICAgICAgIHNkLXVocy1zZHI1MDsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgc2Qt dWhzLXNkcjEwNDsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgbWF4LWZyZXF1ZW5jeSA9 IDwyMDAwMDAwMDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBzdGF0dXMgPSAiZGlz YWJsZWQiOwo+ID4gPiA+ICsgICAgICAgICAgICAgfTsKPiA+ID4gPiArCj4gPiA+ID4gKyAgICAg ICAgICAgICBlbWFjMDogZXRoZXJuZXRAMjAxMTAwMDAgewo+ID4gPiA+ICsgICAgICAgICAgICAg ICAgICAgICBjb21wYXRpYmxlID0gImNkbnMsbWFjYiI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAg ICAgICAgIHJlZyA9IDwweDAgMHgyMDExMDAwMCAweDAgMHgyMDAwPjsKPiA+ID4gPiArICAgICAg ICAgICAgICAgICAgICAgaW50ZXJydXB0LXBhcmVudCA9IDwmcGxpYz47Cj4gPiA+ID4gKyAgICAg ICAgICAgICAgICAgICAgIGludGVycnVwdHMgPSA8NjQgNjUgNjYgNjc+Owo+ID4gPiA+ICsgICAg ICAgICAgICAgICAgICAgICBsb2NhbC1tYWMtYWRkcmVzcyA9IFswMCAwMCAwMCAwMCAwMCAwMF07 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIGNsb2NrcyA9IDwmY2xrY2ZnIDQ+LCA8JmNs a2NmZyAyPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgY2xvY2stbmFtZXMgPSAicGNs ayIsICJoY2xrIjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgc3RhdHVzID0gImRpc2Fi bGVkIjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAgI2FkZHJlc3MtY2VsbHMgPSA8MT47 Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgICNzaXplLWNlbGxzID0gPDA+Owo+ID4gPiA+ ICsgICAgICAgICAgICAgfTsKPiA+ID4gPiArCj4gPiA+ID4gKyAgICAgICAgICAgICBlbWFjMTog ZXRoZXJuZXRAMjAxMTIwMDAgewo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAgICBjb21wYXRp YmxlID0gImNkbnMsbWFjYiI7Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAgIHJlZyA9IDww eDAgMHgyMDExMjAwMCAweDAgMHgyMDAwPjsKPiA+ID4gPiArICAgICAgICAgICAgICAgICAgICAg aW50ZXJydXB0LXBhcmVudCA9IDwmcGxpYz47Cj4gPiA+ID4gKyAgICAgICAgICAgICAgICAgICAg IGludGVycnVwdHMgPSA8NzAgNzEgNzIgNzM+Owo+ID4gPiA+ICsgICAgICAgICAgICAgICAgICAg ICBtYWMtYWRkcmVzcyA9IFswMCAwMCAwMCAwMCAwMCAwMF07Cj4gPiA+ID4gKyAgICAgICAgICAg ICAgICAgICAgIGNsb2NrcyA9IDwmY2xrY2ZnIDU+LCA8JmNsa2NmZyAyPjsKPiA+ID4gPiArICAg ICAgICAgICAgICAgICAgICAgc3RhdHVzID0gImRpc2FibGVkIjsKPiA+ID4gPiArICAgICAgICAg ICAgICAgICAgICAgY2xvY2stbmFtZXMgPSAicGNsayIsICJoY2xrIjsKPiA+ID4gPiArICAgICAg ICAgICAgICAgICAgICAgI2FkZHJlc3MtY2VsbHMgPSA8MT47Cj4gPiA+ID4gKyAgICAgICAgICAg ICAgICAgICAgICNzaXplLWNlbGxzID0gPDA+Owo+ID4gPiA+ICsgICAgICAgICAgICAgfTsKPiA+ ID4gPiArCj4gPiA+ID4gKyAgICAgfTsKPiA+ID4gPiArfTsKPiA+ID4gPgo+ID4gPgo+ID4gPiBf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+ID4gPiBsaW51 eC1yaXNjdiBtYWlsaW5nIGxpc3QKPiA+ID4gbGludXgtcmlzY3ZAbGlzdHMuaW5mcmFkZWFkLm9y Zwo+ID4gPiBodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4 LXJpc2N2Cj4gPgo+ID4gX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX18KPiA+IGxpbnV4LXJpc2N2IG1haWxpbmcgbGlzdAo+ID4gbGludXgtcmlzY3ZAbGlzdHMu aW5mcmFkZWFkLm9yZwo+ID4gaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0 aW5mby9saW51eC1yaXNjdgo+Cj4KPgo+IC0tCj4gUmVnYXJkcywKPiBBdGlzaAoKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtcmlzY3YgbWFpbGlu ZyBsaXN0CmxpbnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJh ZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgo=