From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59412) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wzpni-0000Fy-OK for qemu-devel@nongnu.org; Wed, 25 Jun 2014 12:11:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wzpnh-00087g-DJ for qemu-devel@nongnu.org; Wed, 25 Jun 2014 12:11:58 -0400 Received: from mail-qc0-x229.google.com ([2607:f8b0:400d:c01::229]:63578) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wzpnh-00087a-7Z for qemu-devel@nongnu.org; Wed, 25 Jun 2014 12:11:57 -0400 Received: by mail-qc0-f169.google.com with SMTP id c9so1938223qcz.14 for ; Wed, 25 Jun 2014 09:11:56 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1403669337-5431-1-git-send-email-hunterlaux@gmail.com> Date: Wed, 25 Jun 2014 09:11:56 -0700 Message-ID: From: Hunter Laux Content-Type: multipart/alternative; boundary=001a11c2be92da09d204fcab552a Subject: Re: [Qemu-devel] [PATCH] linux-user: Handle new ARM breakpoint instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: riku.voipio@iki.fi, qemu-devel@nongnu.org --001a11c2be92da09d204fcab552a Content-Type: text/plain; charset=UTF-8 Isn't the instruction decoder really the wrong place to do that since that exception is handled differently in user space and kernel space. It's my understanding that the instruction decoder is also shared by machine emulation. If you're doing machine emulation you'll still want to throw EXCP_UDEF because that's what Linux is expecting. http://lxr.free-electrons.com/source/arch/avr32/kernel/traps.c#L212 It fixed by signal 4 problem during my SBCL build, but there might be a better way to fix this. I think they use every trick in the book to get that thing working. -Hunter Laux On Jun 25, 2014 2:18 AM, "Peter Maydell" wrote: > On 25 June 2014 05:08, Hunter Laux wrote: > > This instruction space is guaranteed to be undefined. > > ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx > > Thumb: 1101 1110 xxxx xxxx > > > > The breakpoint instructions were selected from this instruction space. > > Linux traps the illegal instruction and sends a SIGTRAP if it is a > breakpoint. > > > > Here is the Linux implementation: > > http://lxr.free-electrons.com/source/arch/arm/kernel/ptrace.c#L221 > > > > Signed-off-by: Hunter Laux > > --- > > linux-user/main.c | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/linux-user/main.c b/linux-user/main.c > > index 900a17f..91f2681 100644 > > --- a/linux-user/main.c > > +++ b/linux-user/main.c > > @@ -688,11 +688,29 @@ void cpu_loop(CPUARMState *env) > > uint32_t opcode; > > int rc; > > > > + const uint32_t arm_bkpt_mask = 0x0FFFFFFF; > > + const uint32_t arm_bkpt = 0x07F001F0; > > + const uint32_t arm_bkpt_thumb_mask = 0x0000FFFF; > > + const uint32_t arm_bkpt_thumb = 0x0000DE01; > > + const uint32_t arm_bkpt_thumb2_mask = 0xFFFFFFFF; > > + const uint32_t arm_bkpt_thumb2 = 0xF7F0A000; > > + > > /* we handle the FPU emulation here, as Linux */ > > /* we get the opcode */ > > /* FIXME - what to do if get_user() fails? */ > > get_user_code_u32(opcode, env->regs[15], > env->bswap_code); > > > > + if (env->thumb) { > > + if ((opcode & arm_bkpt_thumb_mask) == arm_bkpt_thumb > > + || (opcode & arm_bkpt_thumb2_mask) == > arm_bkpt_thumb2) { > > + goto excp_debug; > > + } > > + } else { > > + if ((opcode & arm_bkpt_mask) == arm_bkpt) { > > + goto excp_debug; > > + } > > + } > > + > > rc = EmulateAll(opcode, &ts->fpa, env); > > if (rc == 0) { /* illegal instruction */ > > info.si_signo = SIGILL; > > This shouldn't be necessary, because our instruction decoder > causes the BKPT instructions to generate an EXCP_BKPT > (see target-arm/translate.c). So we should never go through > this code path for these instructions... > > thanks > -- PMM > --001a11c2be92da09d204fcab552a Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Isn't the instruction decoder really th= e wrong place to do that since that exception is handled differently in use= r space and kernel space. It's my understanding that the instruction de= coder is also shared by machine emulation. If you're doing machine emul= ation you'll still want to throw EXCP_UDEF because that's what Linu= x is expecting.

http://lxr.free-electrons.com/source/arch/avr32/kernel/= traps.c#L212

It fixed by signal 4 problem during my SBCL build, but there might be a = better way to fix this. I think they use every trick in the book to get tha= t thing working.

-Hunter Laux

On Jun 25, 2014 2:18 AM, "Peter Maydell&quo= t; <peter.= maydell@linaro.org> wrote:
On 25 June 2014 05:08, Hunter Laux <hunterlaux@gmail.com> wrote:
> This instruction space is guaranteed to be undefined.
> ARM: =C2=A0 xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
> Thumb: 1101 1110 xxxx xxxx
>
> The breakpoint instructions were selected from this instruction space.=
> Linux traps the illegal instruction and sends a SIGTRAP if it is a bre= akpoint.
>
> Here is the Linux implementation:
> http://lxr.free-electrons.com/source/arch/arm/ke= rnel/ptrace.c#L221
>
> Signed-off-by: Hunter Laux <hunterlaux@gmail.com>
> ---
> =C2=A0linux-user/main.c | 18 ++++++++++++++++++
> =C2=A01 file changed, 18 insertions(+)
>
> diff --git a/linux-user/main.c b/linux-user/main.c
> index 900a17f..91f2681 100644
> --- a/linux-user/main.c
> +++ b/linux-user/main.c
> @@ -688,11 +688,29 @@ void cpu_loop(CPUARMState *env)
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0uint32_t= opcode;
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0int rc;<= br> >
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0const uint32_= t arm_bkpt_mask =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D 0x0FFFFFFF;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0const uint32_= t arm_bkpt =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 0x07F001F0;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0const uint32_= t arm_bkpt_thumb_mask =C2=A0=3D 0x0000FFFF;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0const uint32_= t arm_bkpt_thumb =C2=A0 =C2=A0 =C2=A0 =3D 0x0000DE01;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0const uint32_= t arm_bkpt_thumb2_mask =3D 0xFFFFFFFF;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0const uint32_= t arm_bkpt_thumb2 =C2=A0 =C2=A0 =C2=A0=3D 0xF7F0A000;
> +
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* we ha= ndle the FPU emulation here, as Linux */
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* we ge= t the opcode */
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* FIXME= - what to do if get_user() fails? */
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0get_user= _code_u32(opcode, env->regs[15], env->bswap_code);
>
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (env->t= humb) {
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0if ((opcode & arm_bkpt_thumb_mask) =3D=3D arm_bkpt_thumb
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0|| (opcode & arm_bkpt_thumb2_mask) =3D=3D arm_bkpt_thu= mb2) {
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0goto excp_debug;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0}
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0} else {
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0if ((opcode & arm_bkpt_mask) =3D=3D arm_bkpt) {
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0goto excp_debug;
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0}
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
> +
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0rc =3D E= mulateAll(opcode, &ts->fpa, env);
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (rc = =3D=3D 0) { /* illegal instruction */
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0info.si_signo =3D SIGILL;

This shouldn't be necessary, because our instruction decoder
causes the BKPT instructions to generate an EXCP_BKPT
(see target-arm/translate.c). So we should never go through
this code path for these instructions...

thanks
-- PMM
--001a11c2be92da09d204fcab552a--