From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8A8EC433B4 for ; Thu, 29 Apr 2021 12:17:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 84FB5613A9 for ; Thu, 29 Apr 2021 12:17:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234473AbhD2MRs (ORCPT ); Thu, 29 Apr 2021 08:17:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233114AbhD2MRr (ORCPT ); Thu, 29 Apr 2021 08:17:47 -0400 Received: from mail-yb1-xb29.google.com (mail-yb1-xb29.google.com [IPv6:2607:f8b0:4864:20::b29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 282A3C06138B; Thu, 29 Apr 2021 05:17:01 -0700 (PDT) Received: by mail-yb1-xb29.google.com with SMTP id g38so78188491ybi.12; Thu, 29 Apr 2021 05:17:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=pvKSWMA+h4VY1N/pm8V8CpfYjYpoN5VTSiX9cgYoepk=; b=F4D+bf3TUu0ExjDShsKGSlCLw9q5eqgc6LEUVOERxdD3UJbfGrucWcgAtNA7ZdScLT znkipL8joyRG1ux7QOfpI2fEYq1x+nuS2DAGm0KD3ZXruwiisRQVSzP1DZhPo82x3PII fhd9uPhTz4kt++jkW5HujLexy5D1bk043KoPWUcTy21KvY4AsVa+u6wBWcmNED6RC1AS dN/00Ls7ZrhVC+78kPKhuPt+34U6M9JupTV3tM/BiQtf7MmrFBUVPq8As/193AzfNqC6 HsWUyD/fDH0Ai7JjH1CMK3zi+7SKjznsn8iSFNHjcR+dxjXjOa9ja4Ql5FLSYMvJxm/k 03JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=pvKSWMA+h4VY1N/pm8V8CpfYjYpoN5VTSiX9cgYoepk=; b=GEGnvt7T22J4UnivmwBKs3QpO+zR8eQa7tdU2xlQI/bmTn2oDP60vdww/L4OTfQ/lG az2pl+E4pxV+GpVvnpBcN9aI542iKbr5Zx2Mr9hEHH0JlMDgNctrLjEA0+dZVDnlqutY nVJ3f0IhSAK7QLGkzVQ9KJP8i6KJyLd8WLW3Gx1J9U04hrYTGW2YmEIpirb/CjXfNwub DMabdfhdEK6RdJBt/LHbX44GI9NKTPshR+c2P++tGLWlya7RW7MXgjP2Y4jSqej+5Q9L x/DpCgpCKi1b4xwY60uTjUTjM0OSrOKBhelX/Z8xlqrT7B77Qg5eWaweFUgSU5F4tP1p wRLA== X-Gm-Message-State: AOAM533vj9fx4d41V6CZ8xdYQFFYboG4SV37GHtGhe5WBeF8NN1BD9y7 /G5akKfL+a2AL0ghgAp5thOCWeoBz7e6ZldIY+M= X-Google-Smtp-Source: ABdhPJwn6bV0wQmK8I7sO2LuJG3UbMEjwgZXHROeUPEs6Mjuq4x7MUSg4zlwALybADmOp0QK7T5DsSTG00FGMVycQt4= X-Received: by 2002:a25:4d56:: with SMTP id a83mr43509949ybb.437.1619698620408; Thu, 29 Apr 2021 05:17:00 -0700 (PDT) MIME-Version: 1.0 References: <20210414070325.924789-1-xxm@rock-chips.com> <5af0f6f8-bc29-f50e-ca14-94049b7d17ed@rock-chips.com> <20210429064117.GA2214470@infradead.org> <20210429115451.GA2287423@infradead.org> In-Reply-To: <20210429115451.GA2287423@infradead.org> From: Peter Geis Date: Thu, 29 Apr 2021 08:16:48 -0400 Message-ID: Subject: Re: [PATCH v7] PCI: rockchip: Add Rockchip RK356X host controller driver To: Christoph Hellwig Cc: Shawn Lin , Simon Xue , Bjorn Helgaas , Lorenzo Pieralisi , linux-pci@vger.kernel.org, "open list:ARM/Rockchip SoC..." , devicetree@vger.kernel.org, Rob Herring , Johan Jonker , Heiko Stuebner Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Apr 29, 2021 at 7:55 AM Christoph Hellwig wrote: > > On Thu, Apr 29, 2021 at 07:26:40AM -0400, Peter Geis wrote: > > Good Morning! I'm trying to implement the MSI workaround in as sane a > > method as possible. > > Do you have a better way to have the kernel only allocate memory in > > the lower regions? > > (Without disabling everything above 4G altogether) > > This chip only supports a maximum of 8G. > > (I know, why they did it while maintaining a 32bit bus is beyond me). > > > Please use dma_alloc_coherent to allocate the memory, the dma_addr_t > return value is the address to be fed to the hardware. Before doing > that set the desired mask. DMA_BIT_MASK(33) would get your 8GB. Thanks! Unfortunately this isn't actually DMA allocation, they were using GFP_DMA32 as a hack to allocate regular kernel memory in the 32 bit range. It's in drivers/irqchip/irq-gic-v3-its.c for reference. The functions are simply kcalloc(), kzalloc(), kzalloc_node(), alloc_pages_node(), and alloc_pages(). I'd prefer not to have to rewrite this driver's entire memory allocation system for one errata. I'm following the code path for dma_alloc_coherent to see if anything sticks out to me though. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8455C433B4 for ; Thu, 29 Apr 2021 12:17:14 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0087061352 for ; Thu, 29 Apr 2021 12:17:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0087061352 Authentication-Results: mail.kernel.org; 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bh=pvKSWMA+h4VY1N/pm8V8CpfYjYpoN5VTSiX9cgYoepk=; b=rG2k4NrL91Px40TAtOZgjE7k21IVMLX6u26wOTJbvTw2j1XoTMMYIaHAYvYfFv7qfZ 6EtP6pgEgO1a+cITqdf0mVAueVyEoEquXJs4lp6lZwbOXWb0NimIq4dM8lzY6S32dxtD xmk6FL5P7wsxWgP7PFTTO5YVwSbG4DGHvSl4lObyn3SifQZ1xQldbJnR4k1ljQxRn41P ZPK+e7pldeKi4PFpMPmA51eX+B3Ftj8IKlS5uAcia+kOLmLavvBvYQRd5/+xOITTmvE6 0q7FcUvknU5nxUNBjtgTBCivNzwWuf+ZF9D2+Xwy0BwpL1OS8mEp+JKcRESTVjuaxsrk Hpjw== X-Gm-Message-State: AOAM532TvGVcAYHo0bqLaXKwbcz/NtWS1Bx4e93wBSMqUp76KVf6jFw2 gCWJfGCo3wR6xd9j0jAGdxtowtDTWMcnKhI3wxJtfYQOLisMEdUe X-Google-Smtp-Source: ABdhPJwn6bV0wQmK8I7sO2LuJG3UbMEjwgZXHROeUPEs6Mjuq4x7MUSg4zlwALybADmOp0QK7T5DsSTG00FGMVycQt4= X-Received: by 2002:a25:4d56:: with SMTP id a83mr43509949ybb.437.1619698620408; Thu, 29 Apr 2021 05:17:00 -0700 (PDT) MIME-Version: 1.0 References: <20210414070325.924789-1-xxm@rock-chips.com> <5af0f6f8-bc29-f50e-ca14-94049b7d17ed@rock-chips.com> <20210429064117.GA2214470@infradead.org> <20210429115451.GA2287423@infradead.org> In-Reply-To: <20210429115451.GA2287423@infradead.org> From: Peter Geis Date: Thu, 29 Apr 2021 08:16:48 -0400 Message-ID: Subject: Re: [PATCH v7] PCI: rockchip: Add Rockchip RK356X host controller driver To: Christoph Hellwig Cc: Shawn Lin , Simon Xue , Bjorn Helgaas , Lorenzo Pieralisi , linux-pci@vger.kernel.org, "open list:ARM/Rockchip SoC..." , devicetree@vger.kernel.org, Rob Herring , Johan Jonker , Heiko Stuebner X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210429_051701_904367_F720467C X-CRM114-Status: GOOD ( 19.51 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Thu, Apr 29, 2021 at 7:55 AM Christoph Hellwig wrote: > > On Thu, Apr 29, 2021 at 07:26:40AM -0400, Peter Geis wrote: > > Good Morning! I'm trying to implement the MSI workaround in as sane a > > method as possible. > > Do you have a better way to have the kernel only allocate memory in > > the lower regions? > > (Without disabling everything above 4G altogether) > > This chip only supports a maximum of 8G. > > (I know, why they did it while maintaining a 32bit bus is beyond me). > > > Please use dma_alloc_coherent to allocate the memory, the dma_addr_t > return value is the address to be fed to the hardware. Before doing > that set the desired mask. DMA_BIT_MASK(33) would get your 8GB. Thanks! Unfortunately this isn't actually DMA allocation, they were using GFP_DMA32 as a hack to allocate regular kernel memory in the 32 bit range. It's in drivers/irqchip/irq-gic-v3-its.c for reference. The functions are simply kcalloc(), kzalloc(), kzalloc_node(), alloc_pages_node(), and alloc_pages(). I'd prefer not to have to rewrite this driver's entire memory allocation system for one errata. I'm following the code path for dma_alloc_coherent to see if anything sticks out to me though. _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip