Re: am335x: 5.18.x: system stalling

[Ard Biesheuvel <ardb@kernel.org>]

On Fri, 27 May 2022 at 14:54, Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Fri, May 27, 2022 at 11:50 AM Yegor Yefremov
> <yegorslists@googlemail.com> wrote:
> >
> > # zcat /proc/config.gz | grep 'CONFIG_ARCH_MULTI_V6\|CONFIG_SMP'
> > # CONFIG_ARCH_MULTI_V6 is not set
> > CONFIG_ARCH_MULTI_V6_V7=y
> > CONFIG_SMP=y
> > CONFIG_SMP_ON_UP=y
> >
> > No stalls.
> >
> > # zcat /proc/config.gz | grep 'CONFIG_ARCH_MULTI_V6\|CONFIG_SMP\|ARCH_OMAP2'
> > CONFIG_ARCH_MULTI_V6=y
> > CONFIG_ARCH_MULTI_V6_V7=y
> > CONFIG_ARCH_OMAP2=y
> > CONFIG_ARCH_OMAP2PLUS=y
> > CONFIG_ARCH_OMAP2PLUS_TYPICAL=y
> >
> > No stalls.
> >
> > As soon as I enable both SMP and OMAP2 options the system stalls.
>
> Ok, that points to the SMP patching for percpu data, which doesn't happen
> before the patch, and which is different between loadable modules and
> the normal code.
>

Not just per-cpu data: there is also the 'current' global variable
which gets used now instead of the user thread ID register, and this
is also different between modules and the core kernel (unless
CONFIG_ARM_MODULE_PLTS is disabled)

I looked at the fdti-sio and slcan modules, and didn't find any
references to per-CPU offsets when building them using the provided
.config. I did find some references to __current, but these seem to be
ignored (they are only emitted to satisfy the "m" inline asm
constraint in get_domain(), but the parameter is never actually used
in the assembler code)


> Can you try out this patch to short-circuit the logic and always return
> the offset for CPU 0? This is obviously broken on SMP machines but
> would get around the bit of code that is V6+SMP specific.
>
>         Arnd
>
> diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
> index 7545c87c251f..3057c5fef970 100644
> --- a/arch/arm/include/asm/percpu.h
> +++ b/arch/arm/include/asm/percpu.h
> @@ -25,10 +25,13 @@ static inline void set_my_cpu_offset(unsigned long off)
>         asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory");
>  }
>
> +extern unsigned long __per_cpu_offset[];
>  static __always_inline unsigned long __my_cpu_offset(void)
>  {
>         unsigned long off;
>
> +       return __per_cpu_offset[0];
> +
>         /*
>          * Read TPIDRPRW.
>          * We want to allow caching the value, so avoid using volatile and