From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E2F1C433E0 for ; Mon, 25 May 2020 07:46:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EC9F520679 for ; Mon, 25 May 2020 07:46:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590392774; bh=fgqR3OQ1PtjHSkmtV10P2hHKo5KnIbUACEU4h7/NwDY=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=NUhJAEVAnGl4yEu1Y0DF3jZI40+O1X90jC3+DqR+APYpHVKVEmGh9QLy5syh/TmK9 G9oJvUkzaRA/l8vD6hBJcqWBdzzZFqvGsB/FS7p6Q12kr9mDc56ntQoCMGUdv5xA/E yP+rHSQBICFenwHQQ02sOgDAYVNPEFz4SCp8bAeM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389162AbgEYHqN (ORCPT ); Mon, 25 May 2020 03:46:13 -0400 Received: from mail.kernel.org ([198.145.29.99]:47278 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389105AbgEYHqN (ORCPT ); Mon, 25 May 2020 03:46:13 -0400 Received: from mail-il1-f178.google.com (mail-il1-f178.google.com [209.85.166.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2AA8B2084C; Mon, 25 May 2020 07:46:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590392772; bh=fgqR3OQ1PtjHSkmtV10P2hHKo5KnIbUACEU4h7/NwDY=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=18NjHvk8ScXaincZb/YmfsI/QWRTplgkBTpu2YO6xlvUH9+CRSqSUsuJc+m0WsfwR Hrivql4XcabyAJcADV4htQDQUsebbxcwc5z8OLIL7h17y3/Z/qxoKZaswCs2GJCXzY 3oijNN+ovScPzBf0r3oycDR/sgKHxZ/e5USy3VSE= Received: by mail-il1-f178.google.com with SMTP id c20so16572051ilk.6; Mon, 25 May 2020 00:46:12 -0700 (PDT) X-Gm-Message-State: AOAM5313MxXw++WMcE0QOIIQ40fdcg0n1X6bed9QLLb2/OVjpx2P8Ayw l9EIVcEBKV/yXjjV/qTBLE8fDOYndhxz8AEfiEg= X-Google-Smtp-Source: ABdhPJyznDWuSesPLw+JJ+5BL9aOApZTfftAlcgXJD7CkLN8jcHhBFDwqaPXE/x7YTJsngd0cfoo32pizca9o+KxyyU= X-Received: by 2002:a92:5ec1:: with SMTP id f62mr20911209ilg.80.1590392771546; Mon, 25 May 2020 00:46:11 -0700 (PDT) MIME-Version: 1.0 References: <20200512141113.18972-1-nicolas.toromanoff@st.com> <20200512141113.18972-6-nicolas.toromanoff@st.com> <67c25d90d9714a85b52f3d9c2070af88@SFHDAG6NODE1.st.com> In-Reply-To: <67c25d90d9714a85b52f3d9c2070af88@SFHDAG6NODE1.st.com> From: Ard Biesheuvel Date: Mon, 25 May 2020 09:46:00 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses To: Nicolas TOROMANOFF Cc: Herbert Xu , "David S . Miller" , Maxime Coquelin , Alexandre TORGUE , Linux Crypto Mailing List , "linux-stm32@st-md-mailman.stormreply.com" , Linux ARM , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Mon, 25 May 2020 at 09:24, Nicolas TOROMANOFF wrote: > > Hello, > > > -----Original Message----- > > From: Ard Biesheuvel > > Sent: Friday, May 22, 2020 6:12 PM> > > On Tue, 12 May 2020 at 16:13, Nicolas Toromanoff > > wrote: > > > > > > Protect STM32 CRC device from concurrent accesses. > > > > > > As we create a spinlocked section that increase with buffer size, we > > > provide a module parameter to release the pressure by splitting > > > critical section in chunks. > > > > > > Size of each chunk is defined in burst_size module parameter. > > > By default burst_size=0, i.e. don't split incoming buffer. > > > > > > Signed-off-by: Nicolas Toromanoff > > > > Would you mind explaining the usage model here? It looks like you are sharing a > > CRC hardware accelerator with a synchronous interface between different users > > by using spinlocks? You are aware that this will tie up the waiting CPUs > > completely during this time, right? So it would be much better to use a mutex > > here. Or perhaps it would make more sense to fall back to a s/w based CRC > > routine if the h/w is tied up working for another task? > > I know mutex are more acceptable here, but shash _update() and _init() may be call > from any context, and so I cannot take a mutex. > And to protect my concurrent HW access I only though about spinlock. Due to possible > constraint on CPUs, I add a burst_size option to force slitting long buffer into smaller one, > and so decrease time we take the lock. > But I didn't though to fallback to software CRC. > > I'll do a patch on top. > In in the burst_update() function I'll use a spin_trylock_irqsave() and use software CRC32 if HW is already in use. > Right. I didn't even notice that you were keeping interrupts disabled the whole time when using the h/w block. That means that any serious use of this h/w block will make IRQ latency go through the roof. I recommend that you go back to the drawing board on this driver, rather than papering over the issues with a spin_trylock(). Perhaps it would be better to model it as a ahash (even though the h/w block itself is synchronous) and use a kthread to feed in the data. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FC19C433E0 for ; Mon, 25 May 2020 07:46:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2609620776 for ; Mon, 25 May 2020 07:46:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="V5Vk7k88"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="18NjHvk8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2609620776 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=X2Fyb29MYyLVG0MfBIK3iem0oyLFzmHwTiHJCW9H3NM=; b=V5Vk7k88p2h6T4 Jpnx/WhY+CXJxlt6Bk8uQw6oRzJh+Ff+TXzQwqtaZysKLaw1658463d5/GSFGWNik2+eHIEyRooUU mXKdvUxwO6SeDi7Yrbo1t+niMoINIPQNfCHFxXb8Tv18kDCnzA9jXBcA6IgUlgTnIQwhECxarKiml Bv5oynK/fuQlQwqkm4g0OtvkDce2Dpk4rNXzPmXwqtr25PVyblcdeww3f4IXIJndZfSwFnRgWm/DE eTS0x67hG+VuEMBUBKIicK0k841ra02d8JdKJgffpZCNhr/MT+HqlVSACfAU9T8GX3/76Drw5LeM3 TGOUyu/xauSh438uOSpQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jd7oN-0004w4-W6; Mon, 25 May 2020 07:46:15 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jd7oL-0004vS-IM for linux-arm-kernel@lists.infradead.org; Mon, 25 May 2020 07:46:14 +0000 Received: from mail-il1-f171.google.com (mail-il1-f171.google.com [209.85.166.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 18A7C20776 for ; Mon, 25 May 2020 07:46:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590392772; bh=fgqR3OQ1PtjHSkmtV10P2hHKo5KnIbUACEU4h7/NwDY=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=18NjHvk8ScXaincZb/YmfsI/QWRTplgkBTpu2YO6xlvUH9+CRSqSUsuJc+m0WsfwR Hrivql4XcabyAJcADV4htQDQUsebbxcwc5z8OLIL7h17y3/Z/qxoKZaswCs2GJCXzY 3oijNN+ovScPzBf0r3oycDR/sgKHxZ/e5USy3VSE= Received: by mail-il1-f171.google.com with SMTP id 17so16570251ilj.3 for ; Mon, 25 May 2020 00:46:12 -0700 (PDT) X-Gm-Message-State: AOAM532/lqbz4dePpd6AmNaMiOt/OaiYI+zB6U6w2OyrhN6HdKZJaaNj h9il27pjYC7xG6REqcDVej/lVdEO2g6caKEZ4KA= X-Google-Smtp-Source: ABdhPJyznDWuSesPLw+JJ+5BL9aOApZTfftAlcgXJD7CkLN8jcHhBFDwqaPXE/x7YTJsngd0cfoo32pizca9o+KxyyU= X-Received: by 2002:a92:5ec1:: with SMTP id f62mr20911209ilg.80.1590392771546; Mon, 25 May 2020 00:46:11 -0700 (PDT) MIME-Version: 1.0 References: <20200512141113.18972-1-nicolas.toromanoff@st.com> <20200512141113.18972-6-nicolas.toromanoff@st.com> <67c25d90d9714a85b52f3d9c2070af88@SFHDAG6NODE1.st.com> In-Reply-To: <67c25d90d9714a85b52f3d9c2070af88@SFHDAG6NODE1.st.com> From: Ard Biesheuvel Date: Mon, 25 May 2020 09:46:00 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses To: Nicolas TOROMANOFF X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200525_004613_644390_A817B6A4 X-CRM114-Status: GOOD ( 23.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre TORGUE , Linux Kernel Mailing List , "David S . Miller" , Linux Crypto Mailing List , Maxime Coquelin , "linux-stm32@st-md-mailman.stormreply.com" , Linux ARM , Herbert Xu Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 25 May 2020 at 09:24, Nicolas TOROMANOFF wrote: > > Hello, > > > -----Original Message----- > > From: Ard Biesheuvel > > Sent: Friday, May 22, 2020 6:12 PM> > > On Tue, 12 May 2020 at 16:13, Nicolas Toromanoff > > wrote: > > > > > > Protect STM32 CRC device from concurrent accesses. > > > > > > As we create a spinlocked section that increase with buffer size, we > > > provide a module parameter to release the pressure by splitting > > > critical section in chunks. > > > > > > Size of each chunk is defined in burst_size module parameter. > > > By default burst_size=0, i.e. don't split incoming buffer. > > > > > > Signed-off-by: Nicolas Toromanoff > > > > Would you mind explaining the usage model here? It looks like you are sharing a > > CRC hardware accelerator with a synchronous interface between different users > > by using spinlocks? You are aware that this will tie up the waiting CPUs > > completely during this time, right? So it would be much better to use a mutex > > here. Or perhaps it would make more sense to fall back to a s/w based CRC > > routine if the h/w is tied up working for another task? > > I know mutex are more acceptable here, but shash _update() and _init() may be call > from any context, and so I cannot take a mutex. > And to protect my concurrent HW access I only though about spinlock. Due to possible > constraint on CPUs, I add a burst_size option to force slitting long buffer into smaller one, > and so decrease time we take the lock. > But I didn't though to fallback to software CRC. > > I'll do a patch on top. > In in the burst_update() function I'll use a spin_trylock_irqsave() and use software CRC32 if HW is already in use. > Right. I didn't even notice that you were keeping interrupts disabled the whole time when using the h/w block. That means that any serious use of this h/w block will make IRQ latency go through the roof. I recommend that you go back to the drawing board on this driver, rather than papering over the issues with a spin_trylock(). Perhaps it would be better to model it as a ahash (even though the h/w block itself is synchronous) and use a kthread to feed in the data. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel