From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Tirado Subject: (unknown) Date: Sun, 21 Oct 2018 16:25:00 +0000 Message-ID: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="000000000000176d2a0578c34cfc" Return-path: Subject: Sender: linux-kernel-owner@vger.kernel.org To: Airlied@linux.ie, dri-devel@lists.freedesktop.org, LKML , kraxel@redhat.com, alexander.deucher@amd.com, christian.koenig@amd.com, David1.zhou@amd.com, Hongbo.He@amd.com Cc: seanpaul@chromium.org, Gustavo@padovan.org, maarten.lankhorst@linux.intel.com List-Id: dri-devel@lists.freedesktop.org --000000000000176d2a0578c34cfc Content-Type: text/plain; charset="UTF-8" Mapping a drm "dumb" buffer fails on 32-bit system (i686) from what appears to be a truncated memory address that has been copied throughout several files. The bug manifests as an -EINVAL when calling mmap with the offset gathered from DRM_IOCTL_MODE_MAP_DUMB <-- DRM_IOCTL_MODE_ADDFB <-- DRM_IOCTL_MODE_CREATE_DUMB. I can provide test code if needed. The following patch will apply to 4.18 though I've only been able to test through qemu bochs driver and nouveau. Intel driver worked without any issues. I'm not sure if everyone is going to want to share a constant, and the whitespace is screwed up from gmail's awful javascript client, so let me know if I should resend this with any specific changes. I have also attached the file with preserved whitespace. --- linux-4.13.8/drivers/gpu/drm/bochs/bochs.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/bochs/bochs.h 2017-10-20 14:34:50.308633773 +0000 @@ -115,8 +115,6 @@ return container_of(gem, struct bochs_bo, gem); } -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - static inline u64 bochs_bo_mmap_offset(struct bochs_bo *bo) { return drm_vma_node_offset_addr(&bo->bo.vma_node); --- linux-4.13.8/drivers/gpu/drm/nouveau/nouveau_drv.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/nouveau/nouveau_drv.h 2017-10-20 14:34:51.581633751 +0000 @@ -57,8 +57,6 @@ struct nouveau_channel; struct platform_device; -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - #include "nouveau_fence.h" #include "nouveau_bios.h" --- linux-4.13.8/drivers/gpu/drm/ast/ast_drv.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/ast/ast_drv.h 2017-10-20 14:34:50.289633773 +0000 @@ -356,8 +356,6 @@ uint32_t handle, uint64_t *offset); -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - int ast_mm_init(struct ast_private *ast); void ast_mm_fini(struct ast_private *ast); --- linux-4.13.8/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c 2017-10-20 14:34:50.644633767 +0000 @@ -21,8 +21,6 @@ #include "hibmc_drm_drv.h" -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - static inline struct hibmc_drm_private * hibmc_bdev(struct ttm_bo_device *bd) { --- linux-4.13.8/drivers/gpu/drm/virtio/virtgpu_ttm.c 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/virtio/virtgpu_ttm.c 2017-10-20 14:34:53.055633725 +0000 @@ -37,8 +37,6 @@ #include -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - static struct virtio_gpu_device *virtio_gpu_get_vgdev(struct ttm_bo_device *bdev) { --- linux-4.13.8/drivers/gpu/drm/qxl/qxl_drv.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/qxl/qxl_drv.h 2017-10-20 14:34:52.072633742 +0000 @@ -88,9 +88,6 @@ } \ } while (0) -#define DRM_FILE_OFFSET 0x100000000ULL -#define DRM_FILE_PAGE_OFFSET (DRM_FILE_OFFSET >> PAGE_SHIFT) - #define QXL_INTERRUPT_MASK (\ QXL_INTERRUPT_DISPLAY |\ QXL_INTERRUPT_CURSOR |\ --- linux-4.13.8/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 2017-10-20 14:34:43.264633895 +0000 @@ -48,3 +48,1 @@ -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - --- linux-4.13.8/drivers/gpu/drm/mgag200/mgag200_drv.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/mgag200/mgag200_drv.h 2017-10-20 14:34:51.404633754 +0000 @@ -276,7 +276,6 @@ struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev); void mgag200_i2c_destroy(struct mga_i2c_chan *i2c); -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) void mgag200_ttm_placement(struct mgag200_bo *bo, int domain); static inline int mgag200_bo_reserve(struct mgag200_bo *bo, bool no_wait) --- linux-4.13.8/drivers/gpu/drm/radeon/radeon_ttm.c 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/radeon/radeon_ttm.c 2017-10-20 14:34:52.588633733 +0000 @@ -45,8 +45,6 @@ #include "radeon_reg.h" #include "radeon.h" -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - static int radeon_ttm_debugfs_init(struct radeon_device *rdev); static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); --- linux-4.13.8/drivers/gpu/drm/cirrus/cirrus_drv.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/drivers/gpu/drm/cirrus/cirrus_drv.h 2017-10-20 14:34:50.333633772 +0000 @@ -178,7 +178,6 @@ #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base) -#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) /* cirrus_mode.c */ void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, --- linux-4.13.8/include/drm/drmP.h 2017-10-18 07:38:33.000000000 +0000 +++ linux-4.13.8-modified/include/drm/drmP.h 2017-10-20 14:35:31.300633060 +0000 @@ -503,4 +503,10 @@ /* helper for handling conditionals in various for_each macros */ #define for_each_if(condition) if (!(condition)) {} else +#if BITS_PER_LONG == 64 +#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) +#else +#define DRM_FILE_PAGE_OFFSET (0x10000000ULL >> PAGE_SHIFT) +#endif + #endif --000000000000176d2a0578c34cfc Content-Type: application/octet-stream; name="drm_file_offset.patch" Content-Disposition: attachment; filename="drm_file_offset.patch" Content-Transfer-Encoding: base64 Content-ID: X-Attachment-Id: f_jnj1vfbu0 LS0tIGxpbnV4LTQuMTMuOC9kcml2ZXJzL2dwdS9kcm0vYm9jaHMvYm9jaHMuaAkyMDE3LTEwLTE4 IDA3OjM4OjMzLjAwMDAwMDAwMCArMDAwMAorKysgbGludXgtNC4xMy44LW1vZGlmaWVkL2RyaXZl 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