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* [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode
@ 2020-05-11  7:30 Aaron Chou
  2020-05-11  8:10 ` Hanjun Guo
  2020-05-11  8:18 ` Sudeep Holla
  0 siblings, 2 replies; 5+ messages in thread
From: Aaron Chou @ 2020-05-11  7:30 UTC (permalink / raw)
  To: lorenzo.pieralisi, guohanjun, sudeep.holla, linux-acpi

In the system, I can get the L3 cache size from two or more ways.

Firstly, I can get it from the kernel interface, such as the `lscpu` command.
Also, I can cat the file `/sys/devices/system/cpu/cpu3/cache/index3/size`.

The way above can give me the L3 cache size is 32768K.

Now if I use the `dmidecode -t cache` command, I get the L3 cache size
is 24576K.

And the real size of the L3 cache is 24576K.

Why is it? who can explain it to me?

Thanks.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode
  2020-05-11  7:30 [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode Aaron Chou
@ 2020-05-11  8:10 ` Hanjun Guo
  2020-05-11  8:18 ` Sudeep Holla
  1 sibling, 0 replies; 5+ messages in thread
From: Hanjun Guo @ 2020-05-11  8:10 UTC (permalink / raw)
  To: Aaron Chou, lorenzo.pieralisi, sudeep.holla, linux-acpi

Hi Aaron,

On 2020/5/11 15:30, Aaron Chou wrote:
> In the system, I can get the L3 cache size from two or more ways.
> 
> Firstly, I can get it from the kernel interface, such as the `lscpu` command.
> Also, I can cat the file `/sys/devices/system/cpu/cpu3/cache/index3/size`.
> 
> The way above can give me the L3 cache size is 32768K.
> 
> Now if I use the `dmidecode -t cache` command, I get the L3 cache size
> is 24576K.
> 
> And the real size of the L3 cache is 24576K.
> 
> Why is it? who can explain it to me?

Seems the cache information from SMBIOS table and ACPI PPTT
table is inconsistent, which the SMBIOS table reports 24576K
for L3 cache, but 32768K in the PPTT table. You can verify
that by dumping the ACPI PPTT table and the SMBIOS table.

Thanks
Hanjun


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode
  2020-05-11  7:30 [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode Aaron Chou
  2020-05-11  8:10 ` Hanjun Guo
@ 2020-05-11  8:18 ` Sudeep Holla
  2020-05-11  8:38   ` Aaron Chou
  1 sibling, 1 reply; 5+ messages in thread
From: Sudeep Holla @ 2020-05-11  8:18 UTC (permalink / raw)
  To: Aaron Chou; +Cc: lorenzo.pieralisi, guohanjun, linux-acpi, Sudeep Holla

On Mon, May 11, 2020 at 03:30:51PM +0800, Aaron Chou wrote:
> In the system, I can get the L3 cache size from two or more ways.
>

Which platform is this ? More details would help.

> Firstly, I can get it from the kernel interface, such as the `lscpu` command.
> Also, I can cat the file `/sys/devices/system/cpu/cpu3/cache/index3/size`.
>

IIRC, lscpu parse the above mentioned sysfs files and the above result
match the expectation.

> The way above can give me the L3 cache size is 32768K.
>

OK

> Now if I use the `dmidecode -t cache` command, I get the L3 cache size
> is 24576K.
>

Ah, that's bad.

> And the real size of the L3 cache is 24576K.
>

OK

> Why is it? who can explain it to me?
>

ACPI reads these cache information from PPTT. The firmware which populates
the ACPI PPTT must read it from DMI entries and keep them in sync. On
this system, looks like the firmware tried to be more imaginative and
populated PPTT with wrong values. Get that firmware fixed please!

--
Regards,
Sudeep

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode
  2020-05-11  8:18 ` Sudeep Holla
@ 2020-05-11  8:38   ` Aaron Chou
  0 siblings, 0 replies; 5+ messages in thread
From: Aaron Chou @ 2020-05-11  8:38 UTC (permalink / raw)
  To: Sudeep Holla; +Cc: lorenzo.pieralisi, guohanjun, linux-acpi

hi Sudeep:

Thanks for your email.

Ok, I'll check it out.

--
Regards,
Aaron.

On Mon, May 11, 2020 at 4:18 PM Sudeep Holla <sudeep.holla@arm.com> wrote:
>
> On Mon, May 11, 2020 at 03:30:51PM +0800, Aaron Chou wrote:
> > In the system, I can get the L3 cache size from two or more ways.
> >
>
> Which platform is this ? More details would help.
>
> > Firstly, I can get it from the kernel interface, such as the `lscpu` command.
> > Also, I can cat the file `/sys/devices/system/cpu/cpu3/cache/index3/size`.
> >
>
> IIRC, lscpu parse the above mentioned sysfs files and the above result
> match the expectation.
>
> > The way above can give me the L3 cache size is 32768K.
> >
>
> OK
>
> > Now if I use the `dmidecode -t cache` command, I get the L3 cache size
> > is 24576K.
> >
>
> Ah, that's bad.
>
> > And the real size of the L3 cache is 24576K.
> >
>
> OK
>
> > Why is it? who can explain it to me?
> >
>
> ACPI reads these cache information from PPTT. The firmware which populates
> the ACPI PPTT must read it from DMI entries and keep them in sync. On
> this system, looks like the firmware tried to be more imaginative and
> populated PPTT with wrong values. Get that firmware fixed please!
>
> --
> Regards,
> Sudeep

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode
@ 2020-05-11  7:28 Aaron Chou
  0 siblings, 0 replies; 5+ messages in thread
From: Aaron Chou @ 2020-05-11  7:28 UTC (permalink / raw)
  To: rjw, lenb, linux-acpi

In the system, I can get the L3 cache size from two or more ways.

Firstly, I can get it from the kernel interface, such as the `lscpu` command.
Also, I can cat the file `/sys/devices/system/cpu/cpu3/cache/index3/size`.

The way above can give me the L3 cache size is 32768K.

Now if I use the `dmidecode -t cache` command, I get the L3 cache size
is 24576K.

And the real size of the L3 cache is 24576K.

Why is it? who can explain it to me?

Thanks.

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-05-11  8:38 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-11  7:30 [ARM64 ACPI] different CPU L3 cache size reported by /sys/device/ and dmidecode Aaron Chou
2020-05-11  8:10 ` Hanjun Guo
2020-05-11  8:18 ` Sudeep Holla
2020-05-11  8:38   ` Aaron Chou
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2020-05-11  7:28 Aaron Chou

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