From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AF83C11F69 for ; Wed, 30 Jun 2021 10:21:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E262161407 for ; Wed, 30 Jun 2021 10:21:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234159AbhF3KYR (ORCPT ); Wed, 30 Jun 2021 06:24:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234120AbhF3KYQ (ORCPT ); Wed, 30 Jun 2021 06:24:16 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66410C06175F for ; Wed, 30 Jun 2021 03:21:47 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id l24so3311307ejq.11 for ; Wed, 30 Jun 2021 03:21:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=pRd6pcMdNebp+pN5HMRRgF54QAuGLj+u/RVF3wGoo18=; b=ATKO+gmm4xEc6zgEP7S6/Z+diDreHx/sUxeSyYuhtT7zwrtOsR0ZtMcFTiDUA8ZlOu JX/hOLoFLa8O29+0/knSdMZQB3/yImsXIvJjt86mYMGf9u0OexWOBu65f8ZHwyBpAxzX Cu5psuErLV+VoTcyFiT/zThG5MBdf/A632cx8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=pRd6pcMdNebp+pN5HMRRgF54QAuGLj+u/RVF3wGoo18=; b=FPeKJjrvgiT/ENuwPy0MF17x9BymYg7dz83H06etfpzef3XAvZAjLWoxzigV6FFiix nrLS5GA/pcnbbVDPGi11Z84EfVh4SK8Ha8dl0TgmF8azsnyB1dvDmO6qnuF4h+EYVkmr boL6VLrDTj2ytvQQaYJZQ4p9sG+4aPEXYkFa1GGeFX4PcR5QkPP1pDQYoSP3S6uBZDLm 0gGh8FOFB+WG0Ex/d0RbuEV7OpyQMt5qaDPKyF1b8sQ3Fg4C5Nbrrsg077CeBnnpS8IU vAVmAhkf7UtO33hVlBN833GY3/H0VGKKmE585bRgaPL4M3rwOBahYIX2bzVpnqBrB99n EvWw== X-Gm-Message-State: AOAM531QPlpwms2a2feAfvsZ/icKnqHZkamohnsA0weyjmITHYlSKvQ/ bLykelkfOjMPHXCh0vLLgiR7TWOqehjNGVBqUiZTHA== X-Google-Smtp-Source: ABdhPJywNEi1yzvhH5/eMxuTSgQsZfHFd6bpKgnli8ZWpww+T6iw62Wvl6+Irx61qHcOCFQlQ5wjQ3GqF0XI0jyTfjM= X-Received: by 2002:a17:906:bb10:: with SMTP id jz16mr31357635ejb.252.1625048505958; Wed, 30 Jun 2021 03:21:45 -0700 (PDT) MIME-Version: 1.0 References: <20210621072424.111733-1-jagan@amarulasolutions.com> <20210621072424.111733-3-jagan@amarulasolutions.com> <2decfea3-3659-2a3b-7706-326c97f57f8e@canonical.com> <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> In-Reply-To: <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> From: Jagan Teki Date: Wed, 30 Jun 2021 15:51:34 +0530 Message-ID: Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver To: Frieder Schrempf , Daniel Vetter , Laurent Pinchart Cc: Krzysztof Kozlowski , Fabio Estevam , Michael Tretter , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Peng Fan , Francis Laniel , Matteo Lisi , Neil Armstrong , linux-amarula , Tomasz Figa , linux-kernel , Robert Foss , Andrzej Hajda , DRI mailing list , Milco Pratesi , Anthony Brandon , linux-phy@lists.infradead.org, Fancy Fang , Shawn Guo , Sascha Hauer , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , NXP Linux Team , "marex@denx.de" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Frieder, Thanks for sharing the details. On Mon, Jun 28, 2021 at 1:49 PM Frieder Schrempf wrote: > > Hi Jagan, > > On 24.06.21 10:30, Krzysztof Kozlowski wrote: > > On 24/06/2021 04:48, Fabio Estevam wrote: > >> Hi Jagan/Laurent, > >> > >> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart > >> wrote: > >> > >>> Looking at the register set, it seems to match the Exynos 5433, > >>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage > >>> that driver instead of adding a new one for the same IP core ? > >> > >> Yes. there was an attempt from Michael in this direction: > >> https://eur04.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa= tchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F20200911135413.3654800-1= -m.tretter%40pengutronix.de%2F&data=3D04%7C01%7Cfrieder.schrempf%40kont= ron.de%7C52db05459ef0462d5a9b08d936eab1ba%7C8c9d3c973fd941c8a2b1646f3942daf= 1%7C0%7C0%7C637601203901391193%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi= LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=3DLTYk9kpUe= B9bgfRITQT6wIij3XTOIk37AHXbzQ2UI4Y%3D&reserved=3D0 > > > > That's the proper direction (maybe as Marek suggested - sharing common > > code like for Analogix DP), not duplicating a driver. > > > > Just to make sure that you are aware of the previous patches and discussi= ons here are some additional pointers: > > * i.MX8MM glue code from Marek (+ Cc): [1] > * DPHY driver from Marek: [2] > * General discussion about driver implementation: [3] > * Daniel's (+ Cc) suggested direction to move forward: [4] It Looks like Daniel's suggestion is to have a common bridge driver without sharing a code between platforms. It makes sense and clean but the key issues lie on the exynos side, the exynos drm drives require potential changes and tests, which indeed are hard but possible - IMHO. However there is another issue with component_ops the i.MX8M side MXSFB doesn't use any component_ops but the exynos are fully component aware. > > It looks like you already did a fork of the Exynos driver, so your approa= ch might be generally in line with what Daniel suggested. I did use PMS computation from exynos and reference driver from imx8 tree. Last 2 days I worked on exynos_drm_dsi.c (with some additions) and converted a bridge driver and it worked on my i.MX8MM platform. Right now, I'm checking the possible implementations and will come back to my approach for further comments. Jagan. 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bh=pRd6pcMdNebp+pN5HMRRgF54QAuGLj+u/RVF3wGoo18=; b=T46cKcL9FnqmiSJTz652Da8jjoyl3jTMIse/lCvahL6ikk5K1b8XEtcXxvVvuHj4hK sfvBMjmmb4CtB13bG8qjbi2BTBPHWPmGbCVrBxR4l4pJapvBuyZl1diG2KViyuuozbu9 YDR6o3kLo00QbwJ4QwRqaPI/fCSrTzDoAyH7Tj1E4+JPKToNdGruOoy2hOvTIKS6z9iD /22QQKpH4fiT6FFfMWtkTfQ0YH5tkXNFIfOZl5i7Oa2oZQGgaEZDb+bNZGShSivRbgtd u9G1+bxRwz5VBc+Rh35nF4rhZK2sDbULBU0cgJU5jgGglWHpnrz8gGPzvEAoNYrz3rdN bCLA== X-Gm-Message-State: AOAM533CVUmIcLH+d2DgAiYXyZITj/MWtKHghoc4BcZtYyUKwCHbcU1e BUq+gYeFCFG83tLJYMxc4Jyjc9tlSvNRkf8j8IQphA== X-Google-Smtp-Source: ABdhPJywNEi1yzvhH5/eMxuTSgQsZfHFd6bpKgnli8ZWpww+T6iw62Wvl6+Irx61qHcOCFQlQ5wjQ3GqF0XI0jyTfjM= X-Received: by 2002:a17:906:bb10:: with SMTP id jz16mr31357635ejb.252.1625048505958; Wed, 30 Jun 2021 03:21:45 -0700 (PDT) MIME-Version: 1.0 References: <20210621072424.111733-1-jagan@amarulasolutions.com> <20210621072424.111733-3-jagan@amarulasolutions.com> <2decfea3-3659-2a3b-7706-326c97f57f8e@canonical.com> <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> In-Reply-To: <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> From: Jagan Teki Date: Wed, 30 Jun 2021 15:51:34 +0530 Message-ID: Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver To: Frieder Schrempf , Daniel Vetter , Laurent Pinchart Cc: Krzysztof Kozlowski , Fabio Estevam , Michael Tretter , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Peng Fan , Francis Laniel , Matteo Lisi , Neil Armstrong , linux-amarula , Tomasz Figa , linux-kernel , Robert Foss , Andrzej Hajda , DRI mailing list , Milco Pratesi , Anthony Brandon , linux-phy@lists.infradead.org, Fancy Fang , Shawn Guo , Sascha Hauer , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , NXP Linux Team , "marex@denx.de" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210630_032149_519404_0E7905AD X-CRM114-Status: GOOD ( 21.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Frieder, Thanks for sharing the details. On Mon, Jun 28, 2021 at 1:49 PM Frieder Schrempf wrote: > > Hi Jagan, > > On 24.06.21 10:30, Krzysztof Kozlowski wrote: > > On 24/06/2021 04:48, Fabio Estevam wrote: > >> Hi Jagan/Laurent, > >> > >> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart > >> wrote: > >> > >>> Looking at the register set, it seems to match the Exynos 5433, > >>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage > >>> that driver instead of adding a new one for the same IP core ? > >> > >> Yes. there was an attempt from Michael in this direction: > >> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F20200911135413.3654800-1-m.tretter%40pengutronix.de%2F&data=04%7C01%7Cfrieder.schrempf%40kontron.de%7C52db05459ef0462d5a9b08d936eab1ba%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637601203901391193%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=LTYk9kpUeB9bgfRITQT6wIij3XTOIk37AHXbzQ2UI4Y%3D&reserved=0 > > > > That's the proper direction (maybe as Marek suggested - sharing common > > code like for Analogix DP), not duplicating a driver. > > > > Just to make sure that you are aware of the previous patches and discussions here are some additional pointers: > > * i.MX8MM glue code from Marek (+ Cc): [1] > * DPHY driver from Marek: [2] > * General discussion about driver implementation: [3] > * Daniel's (+ Cc) suggested direction to move forward: [4] It Looks like Daniel's suggestion is to have a common bridge driver without sharing a code between platforms. It makes sense and clean but the key issues lie on the exynos side, the exynos drm drives require potential changes and tests, which indeed are hard but possible - IMHO. However there is another issue with component_ops the i.MX8M side MXSFB doesn't use any component_ops but the exynos are fully component aware. > > It looks like you already did a fork of the Exynos driver, so your approach might be generally in line with what Daniel suggested. I did use PMS computation from exynos and reference driver from imx8 tree. Last 2 days I worked on exynos_drm_dsi.c (with some additions) and converted a bridge driver and it worked on my i.MX8MM platform. Right now, I'm checking the possible implementations and will come back to my approach for further comments. Jagan. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7BF6C11F65 for ; Wed, 30 Jun 2021 10:21:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 38BA961992 for ; Wed, 30 Jun 2021 10:21:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 38BA961992 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1A49F89DC7; Wed, 30 Jun 2021 10:21:48 +0000 (UTC) Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by gabe.freedesktop.org (Postfix) with ESMTPS id 630B689DC7 for ; Wed, 30 Jun 2021 10:21:47 +0000 (UTC) Received: by mail-ej1-x62b.google.com with SMTP id yy20so3366327ejb.6 for ; Wed, 30 Jun 2021 03:21:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=pRd6pcMdNebp+pN5HMRRgF54QAuGLj+u/RVF3wGoo18=; b=ATKO+gmm4xEc6zgEP7S6/Z+diDreHx/sUxeSyYuhtT7zwrtOsR0ZtMcFTiDUA8ZlOu JX/hOLoFLa8O29+0/knSdMZQB3/yImsXIvJjt86mYMGf9u0OexWOBu65f8ZHwyBpAxzX Cu5psuErLV+VoTcyFiT/zThG5MBdf/A632cx8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=pRd6pcMdNebp+pN5HMRRgF54QAuGLj+u/RVF3wGoo18=; b=Cye34sGEJowPAIkppdkGWDCvCiU5KWc3COTKOBeETT6ml+7QInH7q3orCsga4xBPss JLPtjl2+xT2LYAqZ4yDe9b4QXd9Q47fAyr8r5Iy66LUg0qfEwmn9T6B9ragCPJQ0KuON gpggEA9mqLuNnIeulcKG0/X41A9lMaKayq+1AJi/fQEfVUNOuF1nIjrgLuOjkgQWA4yo yTzlNKskxXe74j5Z7XiqgkeNoXW7Z4OMg6PgnEj1+7ILMeIMZNYEGI1KuDYBgCP2XEa6 rHLZrgpIDsc1l15N1SieYnpCPe1XpetUOvvdp+PCzmOyo/dt/UxymJc2Uj2tibR6O9sE RtWA== X-Gm-Message-State: AOAM533mYN+MD7JJb5NxfiEB56FIU5QjhaU/CHS4l+EcIGT364K1+Jy7 XbA2C8SMFgGBV3KwWeKoWhOPvivX6/hMoxaRw+jNjQ== X-Google-Smtp-Source: ABdhPJywNEi1yzvhH5/eMxuTSgQsZfHFd6bpKgnli8ZWpww+T6iw62Wvl6+Irx61qHcOCFQlQ5wjQ3GqF0XI0jyTfjM= X-Received: by 2002:a17:906:bb10:: with SMTP id jz16mr31357635ejb.252.1625048505958; Wed, 30 Jun 2021 03:21:45 -0700 (PDT) MIME-Version: 1.0 References: <20210621072424.111733-1-jagan@amarulasolutions.com> <20210621072424.111733-3-jagan@amarulasolutions.com> <2decfea3-3659-2a3b-7706-326c97f57f8e@canonical.com> <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> In-Reply-To: <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> From: Jagan Teki Date: Wed, 30 Jun 2021 15:51:34 +0530 Message-ID: Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver To: Frieder Schrempf , Daniel Vetter , Laurent Pinchart Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Fan , Neil Armstrong , Tomasz Figa , DRI mailing list , linux-kernel , Andrzej Hajda , Milco Pratesi , linux-phy@lists.infradead.org, Fancy Fang , "marex@denx.de" , Krzysztof Kozlowski , NXP Linux Team , Anthony Brandon , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Matteo Lisi , Sascha Hauer , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Francis Laniel , Shawn Guo , Michael Tretter , Robert Foss , linux-amarula Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Frieder, Thanks for sharing the details. On Mon, Jun 28, 2021 at 1:49 PM Frieder Schrempf wrote: > > Hi Jagan, > > On 24.06.21 10:30, Krzysztof Kozlowski wrote: > > On 24/06/2021 04:48, Fabio Estevam wrote: > >> Hi Jagan/Laurent, > >> > >> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart > >> wrote: > >> > >>> Looking at the register set, it seems to match the Exynos 5433, > >>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage > >>> that driver instead of adding a new one for the same IP core ? > >> > >> Yes. there was an attempt from Michael in this direction: > >> https://eur04.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa= tchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F20200911135413.3654800-1= -m.tretter%40pengutronix.de%2F&data=3D04%7C01%7Cfrieder.schrempf%40kont= ron.de%7C52db05459ef0462d5a9b08d936eab1ba%7C8c9d3c973fd941c8a2b1646f3942daf= 1%7C0%7C0%7C637601203901391193%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi= LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=3DLTYk9kpUe= B9bgfRITQT6wIij3XTOIk37AHXbzQ2UI4Y%3D&reserved=3D0 > > > > That's the proper direction (maybe as Marek suggested - sharing common > > code like for Analogix DP), not duplicating a driver. > > > > Just to make sure that you are aware of the previous patches and discussi= ons here are some additional pointers: > > * i.MX8MM glue code from Marek (+ Cc): [1] > * DPHY driver from Marek: [2] > * General discussion about driver implementation: [3] > * Daniel's (+ Cc) suggested direction to move forward: [4] It Looks like Daniel's suggestion is to have a common bridge driver without sharing a code between platforms. It makes sense and clean but the key issues lie on the exynos side, the exynos drm drives require potential changes and tests, which indeed are hard but possible - IMHO. However there is another issue with component_ops the i.MX8M side MXSFB doesn't use any component_ops but the exynos are fully component aware. > > It looks like you already did a fork of the Exynos driver, so your approa= ch might be generally in line with what Daniel suggested. I did use PMS computation from exynos and reference driver from imx8 tree. Last 2 days I worked on exynos_drm_dsi.c (with some additions) and converted a bridge driver and it worked on my i.MX8MM platform. Right now, I'm checking the possible implementations and will come back to my approach for further comments. Jagan. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 585A1C11F65 for ; Wed, 30 Jun 2021 10:22:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ED20E61992 for ; Wed, 30 Jun 2021 10:22:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ED20E61992 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: mail.kernel.org; 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b=Xrn0XCFN1ljnroG1C1RHApeYt3bobPkuC5F+/KCOPxiokYvr51vqJ7l+dGM7SmqWDO kysLkzHP9AHaItZ6qXJOUrMbSno3hYTeelffm0vcbVmgQH8lwssZ7XCoggy1kGnoIhUS 9LuSoUVnbajeGTJHhTFkWRN++aVLX6gt3unI3UD0K1tKRMpoj8hzIz8PISUGqDs9cXCj WoVU91f53JV2i0xzIYgzjPjHwIEimRHod7yBrcs+fcOzq38D/9VwbCDDSrOk4Xu7Ux7j r2CuTgaU0l2QdksW03iWJ5AttJQY/TdiBwwW538s9GPlGdjbPmtUroGWF7pBLNfgtDto WH9Q== X-Gm-Message-State: AOAM5313gfk0y5CuojO5yc365SLZ0ybO4MZn93945MN0/nVfYOvvAw3W Jw3EddL9fQEplQBI/+A+U/j37FcTJmDrbndhDXR/HA== X-Google-Smtp-Source: ABdhPJywNEi1yzvhH5/eMxuTSgQsZfHFd6bpKgnli8ZWpww+T6iw62Wvl6+Irx61qHcOCFQlQ5wjQ3GqF0XI0jyTfjM= X-Received: by 2002:a17:906:bb10:: with SMTP id jz16mr31357635ejb.252.1625048505958; Wed, 30 Jun 2021 03:21:45 -0700 (PDT) MIME-Version: 1.0 References: <20210621072424.111733-1-jagan@amarulasolutions.com> <20210621072424.111733-3-jagan@amarulasolutions.com> <2decfea3-3659-2a3b-7706-326c97f57f8e@canonical.com> <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> In-Reply-To: <3aa47f60-94ab-cf0f-3777-3a872dd0e6d4@kontron.de> From: Jagan Teki Date: Wed, 30 Jun 2021 15:51:34 +0530 Message-ID: Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver To: Frieder Schrempf , Daniel Vetter , Laurent Pinchart Cc: Krzysztof Kozlowski , Fabio Estevam , Michael Tretter , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Peng Fan , Francis Laniel , Matteo Lisi , Neil Armstrong , linux-amarula , Tomasz Figa , linux-kernel , Robert Foss , Andrzej Hajda , DRI mailing list , Milco Pratesi , Anthony Brandon , linux-phy@lists.infradead.org, Fancy Fang , Shawn Guo , Sascha Hauer , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , NXP Linux Team , "marex@denx.de" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210630_032149_520655_B63D8AF5 X-CRM114-Status: GOOD ( 20.06 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi Frieder, Thanks for sharing the details. On Mon, Jun 28, 2021 at 1:49 PM Frieder Schrempf wrote: > > Hi Jagan, > > On 24.06.21 10:30, Krzysztof Kozlowski wrote: > > On 24/06/2021 04:48, Fabio Estevam wrote: > >> Hi Jagan/Laurent, > >> > >> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart > >> wrote: > >> > >>> Looking at the register set, it seems to match the Exynos 5433, > >>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage > >>> that driver instead of adding a new one for the same IP core ? > >> > >> Yes. there was an attempt from Michael in this direction: > >> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F20200911135413.3654800-1-m.tretter%40pengutronix.de%2F&data=04%7C01%7Cfrieder.schrempf%40kontron.de%7C52db05459ef0462d5a9b08d936eab1ba%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637601203901391193%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=LTYk9kpUeB9bgfRITQT6wIij3XTOIk37AHXbzQ2UI4Y%3D&reserved=0 > > > > That's the proper direction (maybe as Marek suggested - sharing common > > code like for Analogix DP), not duplicating a driver. > > > > Just to make sure that you are aware of the previous patches and discussions here are some additional pointers: > > * i.MX8MM glue code from Marek (+ Cc): [1] > * DPHY driver from Marek: [2] > * General discussion about driver implementation: [3] > * Daniel's (+ Cc) suggested direction to move forward: [4] It Looks like Daniel's suggestion is to have a common bridge driver without sharing a code between platforms. It makes sense and clean but the key issues lie on the exynos side, the exynos drm drives require potential changes and tests, which indeed are hard but possible - IMHO. However there is another issue with component_ops the i.MX8M side MXSFB doesn't use any component_ops but the exynos are fully component aware. > > It looks like you already did a fork of the Exynos driver, so your approach might be generally in line with what Daniel suggested. I did use PMS computation from exynos and reference driver from imx8 tree. Last 2 days I worked on exynos_drm_dsi.c (with some additions) and converted a bridge driver and it worked on my i.MX8MM platform. Right now, I'm checking the possible implementations and will come back to my approach for further comments. Jagan. -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy