From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Wed, 20 May 2020 00:17:25 +0530
Subject: [PATCH v11 07/18] sifive: dts: fu540: Add DDR controller and phy
 register settings
In-Reply-To: <20200519070346.24479-8-pragnesh.patel@sifive.com>
References: <20200519070346.24479-1-pragnesh.patel@sifive.com>
 <20200519070346.24479-8-pragnesh.patel@sifive.com>
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On Tue, May 19, 2020 at 12:34 PM Pragnesh Patel
<pragnesh.patel@sifive.com> wrote:
>
> Add DDR controller and phy register settings, taken from fsbl
> (https://github.com/sifive/freedom-u540-c000-bootloader.git)
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> Tested-by: Bin Meng <bmeng.cn@gmail.com>
> ---

Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>