From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Fri, 10 Jan 2020 00:17:14 +0530 Subject: [PATCH v6 0/6] rockchip: Add Binman support In-Reply-To: <40b9272c-99b3-698e-b2f4-064b4c8df2be@phytec.de> References: <20200104083806.3930-1-jagan@amarulasolutions.com> <9f2abff1-3785-eefb-dfe0-75bd021dc6bc@rock-chips.com> <35a3b69a-b7d0-5f38-1992-d608d163c979@phytec.de> <40b9272c-99b3-698e-b2f4-064b4c8df2be@phytec.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, Jan 9, 2020 at 8:58 PM Wadim Egorov wrote: > > Hi Jagan, > > On 09.01.20 14:59, Jagan Teki wrote: > > On Wed, Jan 8, 2020 at 5:04 PM Wadim Egorov wrote: > >> Hi, > >> > >> On 07.01.20 10:59, Kever Yang wrote: > >>> Add Wadim in cc, > >>> > >>> Hi Jagan, > >>> > >>> After this patch set apply, the phycore-rk3288 board's SPL size is > >>> overflow: > >>> > >>> arm: + phycore-rk3288 > >>> +Error: SPL image is too large (size 0x9000 than 0x8000) > >>> +Error: Bad parameters for image type > >>> > >>> Maybe we need to enable the TPL for this board? @Wadim > >> I would like it to keep the SPL for the phyCORE board. In this thread > >> [1] I pointed out that you can drop the phycore_init() function that was > >> sometimes blowing up the size of the phyCORE SPL image. So if there is > >> no new other feature that increases the SPL size, we can just remove the > >> code and the SPL should fit again. If you like I can take a look at this > >> next week. > > This won't help much, but one possibility is to use SPL_OF_PLATDATA > > (I've verified). Can you help us to try as quickly as possible? or do > > you want us to try? > > Or we can simply disable CONFIG_SPL_I2C_SUPPORT and > CONFIG_SPL_POWER_SUPPORT in the phycore-rk3288_defconfig. This seems fixed, sent the patches please test the same, thanks!